@@ -186,6 +186,7 @@ static struct edma_soc_info da850_edma_info[] = {
.n_cc = 1,
.queue_tc_mapping = da8xx_queue_tc_mapping,
.queue_priority_mapping = da8xx_queue_priority_mapping,
+ .default_queue = EVENTQ_1,
},
{
.n_channel = 32,
@@ -195,6 +196,7 @@ static struct edma_soc_info da850_edma_info[] = {
.n_cc = 1,
.queue_tc_mapping = da850_queue_tc_mapping,
.queue_priority_mapping = da850_queue_priority_mapping,
+ .default_queue = EVENTQ_0,
},
};
@@ -1447,8 +1447,6 @@ static int __init edma_probe(struct platform_device *pdev)
EDMA_MAX_CC);
edma_info[j]->default_queue = info[j].default_queue;
- if (!edma_info[j]->default_queue)
- edma_info[j]->default_queue = EVENTQ_1;
dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
edmacc_regs_base[j]);
@@ -1508,7 +1506,7 @@ static int __init edma_probe(struct platform_device *pdev)
* started by the codec engine will not cause audio defects.
*/
for (i = 0; i < edma_info[j]->num_channels; i++)
- map_dmach_queue(j, i, EVENTQ_1);
+ map_dmach_queue(j, i, edma_info[j]->default_queue);
queue_tc_mapping = info[j].queue_tc_mapping;
queue_priority_mapping = info[j].queue_priority_mapping;