spi chip select using a gpio

Commit Message

Raffaele Recalcati May 7, 2010, 3:34 p.m. UTC

None

Patch

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index cc62b2c..3183568 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -702,12 +702,14 @@  void __init dm365_init_spi0(unsigned chipselect_mask,
        davinci_cfg_reg(DM365_SPI0_SDI);
        davinci_cfg_reg(DM365_SPI0_SDO);

-       /* not all slaves will be wired up */
-       if (chipselect_mask & BIT(0))
-               davinci_cfg_reg(DM365_SPI0_SDENA0);
-       if (chipselect_mask & BIT(1))
-               davinci_cfg_reg(DM365_SPI0_SDENA1);
-
+       if  (!((unsigned long) info->controller_data)) {
+               /* not all slaves will be wired up */
+               if (chipselect_mask & BIT(0))
+                       davinci_cfg_reg(DM365_SPI0_SDENA0);
+               if (chipselect_mask & BIT(1))
+                       davinci_cfg_reg(DM365_SPI0_SDENA1);
+       }
+
        spi_register_board_info(info, len);

        platform_device_register(&dm365_spi0_device);



diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 225ab60..8fef47b 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -28,6 +28,7 @@ 
 #include <linux/spi/spi.h>
 #include <linux/spi/spi_bitbang.h>

+#include <mach/gpio.h>
 #include <mach/spi.h>
 #include <mach/edma.h>

@@ -269,19 +270,29 @@  static void davinci_spi_chipselect(struct spi_device
*spi, int value)
        pdata = davinci_spi->pdata;

        /*
-        * Board specific chip select logic decides the polarity and cs
-        * line for the controller
-        */
+       * Board specific chip select logic decides the polarity and cs
+       * line for the controller
+       */
        if (value == BITBANG_CS_INACTIVE) {
-               set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT);

-               data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
-               iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+               if  ((unsigned long) spi->controller_data) {
+                       gpio_set_value(spi->controller_data, !(spi->mode &
SPI_CS_HIGH));
+               } else {
+                       set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT);

+                       data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
+                       iowrite32(data1_reg_val, davinci_spi->base +
SPIDAT1);
+               }
+
                while ((ioread32(davinci_spi->base + SPIBUF)
-                                       & SPIBUF_RXEMPTY_MASK) == 0)
+                               & SPIBUF_RXEMPTY_MASK) == 0)
                        cpu_relax();
+       } else {
+               if  ((unsigned long) spi->controller_data) {
+                       gpio_set_value(spi->controller_data, (spi->mode &
SPI_CS_HIGH));
+               }
        }