From patchwork Fri May 7 15:34:09 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raffaele Recalcati X-Patchwork-Id: 97750 Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o47FZxSI020390 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Fri, 7 May 2010 15:36:36 GMT Received: from dlep36.itg.ti.com ([157.170.170.91]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id o47FYFRm001249 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 7 May 2010 10:34:15 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id o47FYEUo002997; Fri, 7 May 2010 10:34:14 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id CB4EB80627; Fri, 7 May 2010 10:34:13 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 4B64780626 for ; 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c=nofws; d=gmail.com; s=gamma; h=mime-version:date:message-id:subject:from:to:content-type; b=rSbp2Oe2RO77oognfcIsp6R2DIXMVAlq5DzRgoy6xjDLf2tI6VrmKt//SnnRVCV0cJ XpnIcl2nHQlECRsImFnGaANhLTSapV2jfEbdX4cMfvFqwys/y4ZyryolmL9glrhCdd7Q gH6g49jijWBmQcthiACTuSXVvNMnFyyZvQim0= MIME-Version: 1.0 Received: by 10.239.190.77 with SMTP id w13mr16409hbh.196.1273246449603; Fri, 07 May 2010 08:34:09 -0700 (PDT) Received: by 10.239.169.17 with HTTP; Fri, 7 May 2010 08:34:09 -0700 (PDT) Date: Fri, 7 May 2010 17:34:09 +0200 Message-ID: Subject: spi chip select using a gpio From: Raffaele Recalcati To: davinci-linux-open-source X-pstn-neptune: 0/0/0.00/0 X-pstn-levels: (S: 1.65946/99.90000 CV:99.9000 FC:95.5390 LC:95.5390 R:95.9108 P:95.9108 M:97.0282 C:98.6951 ) X-pstn-settings: 2 (0.5000:0.5000) s cv gt3 gt2 gt1 r p m c X-pstn-addresses: from [db-null] X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Fri, 07 May 2010 15:36:42 +0000 (UTC) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index cc62b2c..3183568 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -702,12 +702,14 @@ void __init dm365_init_spi0(unsigned chipselect_mask, davinci_cfg_reg(DM365_SPI0_SDI); davinci_cfg_reg(DM365_SPI0_SDO); - /* not all slaves will be wired up */ - if (chipselect_mask & BIT(0)) - davinci_cfg_reg(DM365_SPI0_SDENA0); - if (chipselect_mask & BIT(1)) - davinci_cfg_reg(DM365_SPI0_SDENA1); - + if (!((unsigned long) info->controller_data)) { + /* not all slaves will be wired up */ + if (chipselect_mask & BIT(0)) + davinci_cfg_reg(DM365_SPI0_SDENA0); + if (chipselect_mask & BIT(1)) + davinci_cfg_reg(DM365_SPI0_SDENA1); + } + spi_register_board_info(info, len); platform_device_register(&dm365_spi0_device); diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 225ab60..8fef47b 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -28,6 +28,7 @@ #include #include +#include #include #include @@ -269,19 +270,29 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) pdata = davinci_spi->pdata; /* - * Board specific chip select logic decides the polarity and cs - * line for the controller - */ + * Board specific chip select logic decides the polarity and cs + * line for the controller + */ if (value == BITBANG_CS_INACTIVE) { - set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT); - data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT; - iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + if ((unsigned long) spi->controller_data) { + gpio_set_value(spi->controller_data, !(spi->mode & SPI_CS_HIGH)); + } else { + set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT); + data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT; + iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1); + } + while ((ioread32(davinci_spi->base + SPIBUF) - & SPIBUF_RXEMPTY_MASK) == 0) + & SPIBUF_RXEMPTY_MASK) == 0) cpu_relax(); + } else { + if ((unsigned long) spi->controller_data) { + gpio_set_value(spi->controller_data, (spi->mode & SPI_CS_HIGH)); + } }