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Fri, 16 Sep 2022 10:26:38 -0500 Received: from xsjlizhih40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Fri, 16 Sep 2022 10:26:37 -0500 From: Lizhi Hou To: , , , CC: Lizhi Hou , , , , Subject: [PATCH V2 XDMA 0/1] xilinx XDMA driver Date: Fri, 16 Sep 2022 08:26:24 -0700 Message-ID: <1663341985-65589-1-git-send-email-lizhi.hou@amd.com> X-Mailer: git-send-email 1.8.3.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT006:EE_|SA1PR12MB7444:EE_ X-MS-Office365-Filtering-Correlation-Id: 4ec62b1f-371f-4025-3fb0-08da97f7d9bf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JHuZzMnPBnEhwQUBbkL87mSPf5/SS+l1CvmE97uGKmTA5IMl21yDqs4lT6Ds2fRSfzt8d0rEgnvJIQpQw/qBjXo3nMEOjKcWDZDoX+x/hqIS7gGbCcgDtJHiTis9+tTx6dUuv7eKILZjVc/dmR5jYj7twwfco4JMs1aMlZYTWVYgclx5Wo23QV5ovGoKOLJyC6i8D3HhCq2ToN8nfqK8fu9pbNdqXXWQd2MeJ5Po6dm+5HQOvgZN6tAluIbGL5Z1XfLhxxrJT2xzb2KWSc0RAb67mZdcLdvXTFrcBv8e3JhK+SRKDPmZ+WkpHyScU1SH59acLy4IdBvGwpOKoNqAq/LpCDZRrULGEWum4epvcn9Yl1HeI7ULDrOW5cUncvC/szFUAv2GV6ErghxaC9vQsp3g2FR0EzQ2kNq/kBdH4c092wg8/h0cmFX04yi6VIqOPJvOdFujDn6CjOPh3WhsFOZipSWuY8lUqHFyBYsY2776QQDepwriff8APoRkW3YSktZStfxcbWJuFS3ijou6dQjhn7F3gJm7EkHIfP7ejNO4SLNY1HPVfCutJVQmSp3UbQvjoxIxV2j9Qtp9aUJ5EuvR1e50qbxPfdxWOjKifW4XNM3xfaZZPEWt8oi7WAmrXafxivklODdKbgOjGMlmRyaOoItacxjwagzQlBaSY8rcezHOxdZfdAdsqsY48cf4vhYltt8AsEFxfH1PFVmLwmVHac7AylVTfpI8UC2DnFoa3JjjCcPyul5Pht/AGO16WIpu5oLTVrhJ/vjDfVafqrwOkFJkgGQ7TFcPQomjcRrZIYyCiHJIN7QDja/XOa6TBQ7sMv/RaZatiml0wvS8kuPSubz2aaQmFNM3XOc8lSft3/An6Ps2dAyWUZ7MIuDW X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(346002)(39860400002)(136003)(376002)(451199015)(46966006)(36840700001)(40470700004)(6666004)(82740400003)(81166007)(2906002)(44832011)(26005)(478600001)(86362001)(966005)(356005)(82310400005)(186003)(2616005)(316002)(70586007)(70206006)(54906003)(83380400001)(336012)(40480700001)(5660300002)(47076005)(426003)(8676002)(4326008)(36860700001)(8936002)(110136005)(41300700001)(40460700003)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Sep 2022 15:26:39.1627 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4ec62b1f-371f-4025-3fb0-08da97f7d9bf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT006.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7444 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Hello, This V2 of patch series is to provide the platform driver to support the Xilinx XDMA subsystem. The XDMA subsystem is used in conjunction with the PCI Express IP block to provide high performance data transfer between host memory and the card's DMA subsystem. It also provides up to 16 user interrupt wires to user logic that generate interrupts to the host. +-------+ +-------+ +-----------+ PCIe | | | | | | Tx/Rx | | | | AXI | | <=======> | PCIE | <===> | XDMA | <====>| User Logic| | | | | | | +-------+ +-------+ +-----------+ The XDMA has been used for Xilinx Alveo PCIe devices. And it is also integrated into Versal ACAP DMA and Bridge Subsystem. https://www.xilinx.com/products/boards-and-kits/alveo.html https://docs.xilinx.com/r/en-US/pg344-pcie-dma-versal/Introduction-to-the-DMA-and-Bridge-Subsystems The device driver for any FPGA based PCIe device which leverages XDMA can call the standard dmaengine APIs to discover and use the XDMA subsystem without duplicating the XDMA driver code in its own driver. Changes since v1: - Moved filling hardware descriptor to xdma_prep_device_sg(). - Changed hardware descriptor enum to "struct xdma_hw_desc". - Minor changes from code review comments. Lizhi Hou (1): dmaengine: xilinx: xdma: add xilinx xdma driver MAINTAINERS | 10 + drivers/dma/Kconfig | 13 + drivers/dma/xilinx/Makefile | 1 + drivers/dma/xilinx/xdma-regs.h | 171 +++++ drivers/dma/xilinx/xdma.c | 982 +++++++++++++++++++++++++ include/linux/platform_data/amd_xdma.h | 34 + 6 files changed, 1211 insertions(+) create mode 100644 drivers/dma/xilinx/xdma-regs.h create mode 100644 drivers/dma/xilinx/xdma.c create mode 100644 include/linux/platform_data/amd_xdma.h