| Message ID | 20200214091441.27535-1-peter.ujfalusi@ti.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | dmaengine: ti: k3-udma: Fixes for 5.6 | expand |
On 14-02-20, 11:14, Peter Ujfalusi wrote: > Hi Vinod, > > Recently we have uncovered silicon and driver issues which was not addressed in > the initial driver: > > 1. RX channel teardown will lock up the channel if we have stale data > in the DMA FIFOs and we don't have active transfer (no descriptor for UDMA). > The workaround is to use a dummy drain packet in these cases. > > 2. Early TX completion handling > The delayed work approach was not working efficiently causing the UART, SPI > performance to degrade, with the patch from Vignesh we see 10x performance > increase > > 3. TR setup for slave_sg > It was possible that the sg_len() was not multiple of 'burst * dev_width' and > because of this we ended up with incorrect TR setups. > Using a single function for TR setup makes things simpler and error prone among > slave_sg, cyclic and memcpy > > 4. Pause/Resume causes kernel crash > if it was called when we did not had active transfer the uc->desc was NULL. > > 5. The terminated cookie was never marked as completed > client will think that it is still in progress, which is not the case. > Also adding back the check for running channel in tx_status since if the channel > is not running then it implies that it has been terminated, so no transfer is > running. Applied to fixes Thanks
Hi Vinod, Recently we have uncovered silicon and driver issues which was not addressed in the initial driver: 1. RX channel teardown will lock up the channel if we have stale data in the DMA FIFOs and we don't have active transfer (no descriptor for UDMA). The workaround is to use a dummy drain packet in these cases. 2. Early TX completion handling The delayed work approach was not working efficiently causing the UART, SPI performance to degrade, with the patch from Vignesh we see 10x performance increase 3. TR setup for slave_sg It was possible that the sg_len() was not multiple of 'burst * dev_width' and because of this we ended up with incorrect TR setups. Using a single function for TR setup makes things simpler and error prone among slave_sg, cyclic and memcpy 4. Pause/Resume causes kernel crash if it was called when we did not had active transfer the uc->desc was NULL. 5. The terminated cookie was never marked as completed client will think that it is still in progress, which is not the case. Also adding back the check for running channel in tx_status since if the channel is not running then it implies that it has been terminated, so no transfer is running. Regards, Peter --- Peter Ujfalusi (5): dmaengine: ti: k3-udma: Workaround for RX teardown with stale data in peer dmaengine: ti: k3-udma: Move the TR counter calculation to helper function dmaengine: ti: k3-udma: Use the TR counter helper for slave_sg and cyclic dmaengine: ti: k3-udma: Use the channel direction in pause/resume functions dmaengine: ti: k3-udma: Fix terminated transfer handling Vignesh Raghavendra (1): dmaengine: ti: k3-udma: Use ktime/usleep_range based TX completion check drivers/dma/ti/k3-udma.c | 493 ++++++++++++++++++++++++++++----------- 1 file changed, 361 insertions(+), 132 deletions(-)