| Message ID | 20230707190029.476005-1-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | dmaengine: edma: add freescale edma v3 support | expand |
On Fri, Jul 07, 2023 at 03:00:17PM -0400, Frank Li wrote: > This patch series introduces support for the eDMA version 3 from > Freescale. The eDMA v3 brings alterations in the register layout, > particularly, the separation of channel control registers into > different channels. The Transfer Control Descriptor (TCD) layout, > however, remains identical with only the offset being changed. @vkoul: Do you have chance to check these patches again? I fixed all problem that you said. All audio parts of i.MX8x and i.MX9 was dependent on these patches. Frank > > The first 11 patches aim at tidying up the existing Freescale > eDMA code and laying the groundwork for the integration of eDMA v3 > support. > > Patch 1-11: > These patches primarily focus on cleaning up and refactoring the existing > fsl_edma driver code. This is to accommodate the upcoming changes and new > features introduced with the eDMA v3. > > Patch 12: > This patch introduces support for eDMA v3. In addition, this patch has > been designed with an eye towards future upgradability, specifically for > transitioning to eDMA v5. The latter involves a significant upgrade > where the TCD address would need to support 64 bits. > > Patch 13: > This patch focuses on the device tree bindings and their modifications > to properly handle and integrate the changes brought about by eDMA v3 > > Change from v9 to v10 > - use HAS_IOMEM > - move dt-bind before enable v3 > - remove a unused code > - drop patch3 clean up fsl_edma_irq_exit() > > Change from v8 to v9 > - add dmaengine: fsl-edma: fix build error when arch is s390 > fix kernel test robot build issue > > Change from v7 to v8 > -dt-bind: add missed part > > clock-names: > > items: > > - const: dma > > > > clocks: > > maxItems: 1 > > Change from v6 to v7 > -dt-bind: remove "else" branch. > > Change from v5 to v6 > - dt-bind: rework it by fixed top level constraint. > > Change from v4 to v5 > - dt-bind, add example for imx93 to trigger make dt_binding_check to > generate the yaml error. fixed dt_binding_check error. > keep compatible string ordered alphabetically. > > Change from v3 to v4. > - use dma-channel-mask instead of fsl,channel-mask > - don't use dmamux after v3. only use flags to distinguish the IP > difference > - fixed 8qm and imx93 have not CH_MUX register. Previous can work > because dmamux is 0. > > Change from v2 to v3 > - dt-binding: add interrupt-names > - dt-binding: add minItems > - dt-binding: add missed property: fsl,channel-mask > - rework patch 4, removed edma_version to avoid confuse with hardware > IP version. > > Change from v1 to v2 > - fixed issue found by make DT_CHECKER_FLAGS=-m dt_binding_check > - fixed warning found by kernel test robot > > > Frank Li (13): > 1 dmaengine: fsl-edma: fix build error when arch is s390 > 2 dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.c > 3[dropped] dmaengine: fsl-edma: clean up fsl_edma_irq_exit() > 4 dmaengine: fsl-edma: transition from bool fields to bitmask flags in > drvdata > 5 dmaengine: fsl-edma: Remove enum edma_version > 6 dmaengine: fsl-edma: move common IRQ handler to common.c > 7 dmaengine: fsl-edma: simply ATTR_DSIZE and ATTR_SSIZE by using ffs() > 8 dmaengine: fsl-edma: refactor using devm_clk_get_enabled > 9 dmaengine: fsl-edma: move clearing of register interrupt into > setup_irq function > 10 dmaengine: fsl-edma: refactor chan_name setup and safety > 11 dmaengine: fsl-edma: move tcd into struct fsl_dma_chan > 12 dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string > 13 dmaengine: fsl-edma: integrate v3 support > > .../devicetree/bindings/dma/fsl,edma.yaml | 106 +++++- > drivers/dma/Kconfig | 2 +- > drivers/dma/Makefile | 6 +- > drivers/dma/fsl-edma-common.c | 308 +++++++++++------ > drivers/dma/fsl-edma-common.h | 127 +++++-- > drivers/dma/{fsl-edma.c => fsl-edma-main.c} | 320 ++++++++++++++---- > drivers/dma/{mcf-edma.c => mcf-edma-main.c} | 36 +- > 7 files changed, 677 insertions(+), 228 deletions(-) > rename drivers/dma/{fsl-edma.c => fsl-edma-main.c} (62%) > rename drivers/dma/{mcf-edma.c => mcf-edma-main.c} (90%) > > -- > 2.34.1 >
> -----Original Message----- > From: Frank Li <Frank.li@nxp.com> > On Fri, Jul 07, 2023 at 03:00:17PM -0400, Frank Li wrote: > > This patch series introduces support for the eDMA version 3 from > > Freescale. The eDMA v3 brings alterations in the register layout, > > particularly, the separation of channel control registers into > > different channels. The Transfer Control Descriptor (TCD) layout, > > however, remains identical with only the offset being changed. > > @vkoul: > Do you have chance to check these patches again? I fixed all problem > that you said. > All audio parts of i.MX8x and i.MX9 was dependent on these patches. > @vkoul Ping > Frank > > >
On Fri, 07 Jul 2023 15:00:17 -0400, Frank Li wrote: > This patch series introduces support for the eDMA version 3 from > Freescale. The eDMA v3 brings alterations in the register layout, > particularly, the separation of channel control registers into > different channels. The Transfer Control Descriptor (TCD) layout, > however, remains identical with only the offset being changed. > > The first 11 patches aim at tidying up the existing Freescale > eDMA code and laying the groundwork for the integration of eDMA v3 > support. > > [...] Applied, thanks! [01/12] dmaengine: fsl-edma: fix build error when arch is s390 commit: 8b9aee8073a5f3e0c2e418d45a7969270ea576c6 [02/12] dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.c commit: 66aac8ea0a6c79729f99087b1c5a596938e5d838 [03/12] dmaengine: fsl-edma: transition from bool fields to bitmask flags in drvdata commit: 9e006b243962a42f6927d2d9fe1a7b0a29f45265 [04/12] dmaengine: fsl-edma: Remove enum edma_version commit: c26e611433aaa064691343c0168f4671eb5cfa42 [05/12] dmaengine: fsl-edma: move common IRQ handler to common.c commit: 79434f9b97361601e65e0f5576e9760fefebf19a [06/12] dmaengine: fsl-edma: simply ATTR_DSIZE and ATTR_SSIZE by using ffs() commit: ee2dda06465a3b0f533c829a5bdc2ff15588d8e0 [07/12] dmaengine: fsl-edma: refactor using devm_clk_get_enabled commit: a9903de3aa16731846bf924342eca44bdabe9be6 [08/12] dmaengine: fsl-edma: move clearing of register interrupt into setup_irq function commit: f5b3ba52f36adcda7801fba99c414975f19c85d4 [09/12] dmaengine: fsl-edma: refactor chan_name setup and safety commit: 9b05554c5ca6829a60c610191d45f244d8726e95 [10/12] dmaengine: fsl-edma: move tcd into struct fsl_dma_chan commit: 7536f8b371adcc1c4f7ed7ca579da24bdeb14b6f [11/12] dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string commit: 6eb439dff645a1f61a710abfc0d37a50e4d43d1a [12/12] dmaengine: fsl-edma: integrate v3 support commit: 72f5801a4e2b7122ed8ff5672ea965a0b3458e6b Best regards,