From patchwork Thu Oct 5 16:02:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 13410394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F4A3E9270D for ; Thu, 5 Oct 2023 16:20:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241140AbjJEQTI (ORCPT ); Thu, 5 Oct 2023 12:19:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241921AbjJEQQp (ORCPT ); Thu, 5 Oct 2023 12:16:45 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::228]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88D57270F; Thu, 5 Oct 2023 09:02:40 -0700 (PDT) Received: by mail.gandi.net (Postfix) with ESMTPSA id C80341BF205; Thu, 5 Oct 2023 16:02:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1696521758; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=Z6JqOM2eFV5mUBkrVcLPsXsg66/mo6aYEktxPOQcjmw=; b=BEtXOqTTjTqvxrq8Lto8Q+YrGtJktXXzjEMkMHpnNvLm9pQP2K424MU4YyYSPrWZ0TV6nR 1WIso5QhK/YNkXW1RmBZaQK93XkRmSwrxRd8gJZInP+khv2C6uSlpVJsY99OaSyOsoximv LYX6ga8i6Da6sFNTctTJAmfw0xSemqkz4EJGJyT4RDfAt8awJDBOfqSwv8dGPrEROgmO2J r86Sxt2Q1q6veaCzm0Ow6Np4dUl02q82GPdS5wmN8I0WDk/2ehOEQfZW9AT8Z5tHKkFiC9 90idILFhqy5vMwfXCUDHg15mlAtDVQ7gG3Xs94LX7G91wCIAvVwGi/3tFo4p4Q== From: Miquel Raynal To: Lizhi Hou , Brian Xu , Raj Kumar Rampelli , Vinod Koul , Michal Simek Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , linux-kernel@vger.kernel.org, Miquel Raynal Subject: [PATCH v3 0/3] dmaengine: xdma: Cyclic transfers support Date: Thu, 5 Oct 2023 18:02:34 +0200 Message-Id: <20231005160237.2804238-1-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-GND-Sasl: miquel.raynal@bootlin.com Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Hello, Following the introduction of scatter-gather support of Xilinx's XDMA IP in the Linux kernel, here is a small series adding cyclic transfers. The first patch is a preparation patch to ease the review of the second one which actually adds cyclic transfers support. Thanks, Miquèl Changes in v3: * Fixed the kdoc: missing 'cyclic' description in xdma_free_desc(). Changes in v2: * Rebased on top of v6.6-rc1 * Removed the if (!state) superfluous check. * Address a kernel test robot report (uninitialized variable in error case) * Simplify the convoluted logic when filling the hardware descriptors Miquel Raynal (3): ASoC: soc-generic-dmaengine-pcm: Fix function name in comment dmaengine: xilinx: xdma: Prepare the introduction of cyclic transfers dmaengine: xilinx: xdma: Support cyclic transfers drivers/dma/xilinx/xdma-regs.h | 2 + drivers/dma/xilinx/xdma.c | 179 ++++++++++++++++++++++++-- sound/soc/soc-generic-dmaengine-pcm.c | 4 +- 3 files changed, 175 insertions(+), 10 deletions(-)