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Tue, 27 Feb 2024 22:21:25 -0600 From: Vishal Sagar To: , CC: , , , , Subject: [PATCH v2 0/2] Xilinx DPDMA fixes and cyclic dma mode support Date: Tue, 27 Feb 2024 20:21:22 -0800 Message-ID: <20240228042124.3074044-1-vishal.sagar@amd.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: vishal.sagar@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A101:EE_|PH0PR12MB7908:EE_ X-MS-Office365-Filtering-Correlation-Id: 581400dd-a331-420a-5fba-08dc3814c9b8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tEWF/ZBkbCV1hWf+7K47BYhI0trj7vjd8hnpGoU3edwlW9SbbZFdwHYGSB8ZKFnaiMcbitg2OUsgtdnjIg9W2UI/CXeFA/nFJrwGjHWxcPleHs3y3EliPb5hZN09TdQ6ApO48Azqdel1i7qDgGJpnXH4jjWbHiJ4m/m+DXwVcSuPOmYYtjDJ3ibM9P5wKopO07oM2rBW6xwXvgfLIKPP+wk+3C8uaJ4T0zPKLrmI9nhmkF8GJUTQOpLGvlFfLxRHBxR3on+zNwPkAnfdSmWImwQxWHrmiuPd/vmyi7hVc7pg5NdjzpgpwR+10ZqfN3Vakferqi9t+UUaGQfnlAd4JWvaLLhb+2DOJdUWkiKEefSMKO1cB/kIXEMLKsee73D9XgyZrhwqSkPi/gYYECIX/d5hC7qKROkP01QoUnG9vAAXq9XgGqIlKZnVuXZIiGXm9XhzVVKqhNLd9RZnWaBfg6Ua0bEMKT16MUrh+bCFsvD1O/9JoiKc8CRI4uiKqCCFKWUpCBYBAtW1KwInPpZkJPfQKI/pqr8CKms0fbXtymNkAMjIiH+v+42Yhs2u1lDdtqDUrAqzM0K/+8W72r30E7+92vvvzssd0Eq1atjBv5cIgtP2omIgUA4BIOqjN6dw91vzlC1wJ+ZT5XOX48e39eT8cjNtxCNfYwx5yvPRqTC/StYsDvQ3hQIsLP9mFEHHWdPBcj7rikYNi7uQQYZeSMjNUKaXmmDOrGXlQ1fx/VM= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(82310400014)(36860700004);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2024 04:21:51.4103 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 581400dd-a331-420a-5fba-08dc3814c9b8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A101.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7908 This patch series fixes the race condition in vsync IRQ and also adds the support for cyclic dma mode. The cyclic dma mode is added as part of preparation for adding audio streaming support. v2 - 1/2 - Fix as per Laurent's comment in https://lore.kernel.org/lkml/YftWeLCpAfN%2FJnFj@pendragon.ideasonboard.com/ - Add taking lock in another place Neel Gandhi (1): dmaengine: xilinx: dpdma: Fix race condition in vsync IRQ Rohit Visavalia (1): dmaengine: xilinx: dpdma: Add support for cyclic dma mode drivers/dma/xilinx/xilinx_dpdma.c | 107 +++++++++++++++++++++++++++++- 1 file changed, 105 insertions(+), 2 deletions(-)