From patchwork Thu Mar 13 15:14:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 3826561 X-Patchwork-Delegate: vinod.koul@intel.com Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 49246BF540 for ; Thu, 13 Mar 2014 15:18:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 185B9201D5 for ; Thu, 13 Mar 2014 15:18:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 96A08201C7 for ; Thu, 13 Mar 2014 15:18:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754294AbaCMPSE (ORCPT ); Thu, 13 Mar 2014 11:18:04 -0400 Received: from top.free-electrons.com ([176.31.233.9]:42047 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753872AbaCMPPL (ORCPT ); Thu, 13 Mar 2014 11:15:11 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id 418C4F00; Thu, 13 Mar 2014 16:15:10 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id AB0697A5; Thu, 13 Mar 2014 16:15:09 +0100 (CET) From: Maxime Ripard To: Emilio Lopez , Dan Williams , Vinod Koul Cc: Mike Turquette , linux-arm-kernel@lists.infradead.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, kevin.z.m.zh@gmail.com, sunny@allwinnertech.com, shuge@allwinnertech.com, zhuzhenhua@allwinnertech.com, andriy.shevchenko@intel.com, Maxime Ripard Subject: [PATCH v5 3/7] ARM: sunxi: Move the clock protection to machine hooks Date: Thu, 13 Mar 2014 16:14:15 +0100 Message-Id: <1394723659-4995-4-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1394723659-4995-1-git-send-email-maxime.ripard@free-electrons.com> References: <1394723659-4995-1-git-send-email-maxime.ripard@free-electrons.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since we start to have a lot of clocks to protect, some of them in a few boards only, it becomes difficult to handle the clock protection without having to add per machine exceptions. Move these where they belong, in the machine definition code. Signed-off-by: Maxime Ripard --- arch/arm/mach-sunxi/sun4i.c | 9 +++++++++ arch/arm/mach-sunxi/sun5i.c | 14 ++++++++++++++ arch/arm/mach-sunxi/sun7i.c | 14 ++++++++++++++ drivers/clk/sunxi/clk-sunxi.c | 24 ------------------------ 4 files changed, 37 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-sunxi/sun4i.c b/arch/arm/mach-sunxi/sun4i.c index fc28b89b3378..3276e63587fb 100644 --- a/arch/arm/mach-sunxi/sun4i.c +++ b/arch/arm/mach-sunxi/sun4i.c @@ -10,6 +10,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include @@ -19,9 +20,17 @@ static void __init sun4i_dt_init(void) { + struct clk *clk; + sunxi_setup_restart(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + /* Make sure the clocks we absolutely need are enabled */ + /* DDR clock */ + clk = clk_get(NULL, "pll5_ddr"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); } static const char * const sun4i_board_dt_compat[] = { diff --git a/arch/arm/mach-sunxi/sun5i.c b/arch/arm/mach-sunxi/sun5i.c index 623a95ad93b7..990dcfd42681 100644 --- a/arch/arm/mach-sunxi/sun5i.c +++ b/arch/arm/mach-sunxi/sun5i.c @@ -10,6 +10,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include @@ -19,9 +20,22 @@ static void __init sun5i_dt_init(void) { + struct clk *clk; + sunxi_setup_restart(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + /* Make sure the clocks we absolutely need are enabled */ + /* Memory bus clock */ + clk = clk_get(NULL, "mbus"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); + + /* DDR clock */ + clk = clk_get(NULL, "pll5_ddr"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); } static const char * const sun5i_board_dt_compat[] = { diff --git a/arch/arm/mach-sunxi/sun7i.c b/arch/arm/mach-sunxi/sun7i.c index 2e6a8ee1966b..48a090b91a90 100644 --- a/arch/arm/mach-sunxi/sun7i.c +++ b/arch/arm/mach-sunxi/sun7i.c @@ -10,6 +10,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include @@ -19,9 +20,22 @@ static void __init sun7i_dt_init(void) { + struct clk *clk; + sunxi_setup_restart(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + /* Make sure the clocks we absolutely need are enabled */ + /* Memory bus clock */ + clk = clk_get(NULL, "mbus"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); + + /* DDR clock */ + clk = clk_get(NULL, "pll5_ddr"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); } static const char * const sun7i_board_dt_compat[] = { diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index 7119c02c9fa8..27290a0d2624 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -1278,27 +1278,6 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat } } -/** - * System clock protection - * - * By enabling these critical clocks, we prevent their accidental gating - * by the framework - */ -static void __init sunxi_clock_protect(void) -{ - struct clk *clk; - - /* memory bus clock - sun5i+ */ - clk = clk_get(NULL, "mbus"); - if (!IS_ERR(clk)) - clk_prepare_enable(clk); - - /* DDR clock - sun4i+ */ - clk = clk_get(NULL, "pll5_ddr"); - if (!IS_ERR(clk)) - clk_prepare_enable(clk); -} - static void __init sunxi_init_clocks(void) { /* Register factor clocks */ @@ -1315,9 +1294,6 @@ static void __init sunxi_init_clocks(void) /* Register gate clocks */ of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup); - - /* Enable core system clocks */ - sunxi_clock_protect(); } CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sunxi_init_clocks); CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sunxi_init_clocks);