From patchwork Thu Mar 13 15:14:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 3826501 X-Patchwork-Delegate: vinod.koul@intel.com Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D747A9F2BB for ; Thu, 13 Mar 2014 15:17:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A3295201C7 for ; Thu, 13 Mar 2014 15:17:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C6B2D201F0 for ; Thu, 13 Mar 2014 15:17:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754145AbaCMPPV (ORCPT ); Thu, 13 Mar 2014 11:15:21 -0400 Received: from top.free-electrons.com ([176.31.233.9]:42088 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752474AbaCMPPR (ORCPT ); Thu, 13 Mar 2014 11:15:17 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id C084A11D5; Thu, 13 Mar 2014 16:15:16 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 36D1F7A4; Thu, 13 Mar 2014 16:15:16 +0100 (CET) From: Maxime Ripard To: Emilio Lopez , Dan Williams , Vinod Koul Cc: Mike Turquette , linux-arm-kernel@lists.infradead.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, kevin.z.m.zh@gmail.com, sunny@allwinnertech.com, shuge@allwinnertech.com, zhuzhenhua@allwinnertech.com, andriy.shevchenko@intel.com, Maxime Ripard Subject: [PATCH v5 7/7] ARM: sun6i: dt: Add A31 DMA controller to DTSI Date: Thu, 13 Mar 2014 16:14:19 +0100 Message-Id: <1394723659-4995-8-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1394723659-4995-1-git-send-email-maxime.ripard@free-electrons.com> References: <1394723659-4995-1-git-send-email-maxime.ripard@free-electrons.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now that we have a DMA driver, we can add the DMA bindings in the DTSI for the controller and the devices supported that can use DMA. Signed-off-by: Maxime Ripard Acked-by: Arnd Bergmann --- arch/arm/boot/dts/sun6i-a31.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 7fff9a20f079..e687b0d1e838 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -237,6 +237,15 @@ #size-cells = <1>; ranges; + dma: dma-controller@01c02000 { + compatible = "allwinner,sun6i-a31-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <0 50 4>; + clocks = <&ahb1_gates 6>; + resets = <&ahb1_rst 6>; + #dma-cells = <1>; + }; + pio: pinctrl@01c20800 { compatible = "allwinner,sun6i-a31-pinctrl"; reg = <0x01c20800 0x400>; @@ -322,6 +331,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 16>; resets = <&apb2_rst 16>; + dmas = <&dma 6>, <&dma 6>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -333,6 +344,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 17>; resets = <&apb2_rst 17>; + dmas = <&dma 7>, <&dma 7>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -344,6 +357,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 18>; resets = <&apb2_rst 18>; + dmas = <&dma 8>, <&dma 8>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -355,6 +370,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 19>; resets = <&apb2_rst 19>; + dmas = <&dma 9>, <&dma 9>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -366,6 +383,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 20>; resets = <&apb2_rst 20>; + dmas = <&dma 10>, <&dma 10>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -377,6 +396,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 21>; resets = <&apb2_rst 21>; + dmas = <&dma 22>, <&dma 22>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -426,6 +447,8 @@ interrupts = <0 65 4>; clocks = <&ahb1_gates 20>, <&spi0_clk>; clock-names = "ahb", "mod"; + dmas = <&dma 23>, <&dma 23>; + dma-names = "rx", "tx"; resets = <&ahb1_rst 20>; status = "disabled"; }; @@ -436,6 +459,8 @@ interrupts = <0 66 4>; clocks = <&ahb1_gates 21>, <&spi1_clk>; clock-names = "ahb", "mod"; + dmas = <&dma 24>, <&dma 24>; + dma-names = "rx", "tx"; resets = <&ahb1_rst 21>; status = "disabled"; }; @@ -446,6 +471,8 @@ interrupts = <0 67 4>; clocks = <&ahb1_gates 22>, <&spi2_clk>; clock-names = "ahb", "mod"; + dmas = <&dma 25>, <&dma 25>; + dma-names = "rx", "tx"; resets = <&ahb1_rst 22>; status = "disabled"; }; @@ -456,6 +483,8 @@ interrupts = <0 68 4>; clocks = <&ahb1_gates 23>, <&spi3_clk>; clock-names = "ahb", "mod"; + dmas = <&dma 26>, <&dma 26>; + dma-names = "rx", "tx"; resets = <&ahb1_rst 23>; status = "disabled"; };