From patchwork Tue May 6 21:22:22 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Freeman X-Patchwork-Id: 4124251 X-Patchwork-Delegate: vinod.koul@intel.com Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 99680BFF02 for ; Tue, 6 May 2014 21:23:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DB44B202DD for ; Tue, 6 May 2014 21:23:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 09A8B202B4 for ; Tue, 6 May 2014 21:23:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751503AbaEFVWV (ORCPT ); Tue, 6 May 2014 17:22:21 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:11269 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751255AbaEFVWT (ORCPT ); Tue, 6 May 2014 17:22:19 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 06 May 2014 14:21:28 -0700 Received: from hqemhub02.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 06 May 2014 14:16:35 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 06 May 2014 14:16:35 -0700 Received: from cfreeman-dt.nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.342.0; Tue, 6 May 2014 14:22:18 -0700 From: Christopher Freeman To: , , , CC: , , , Christopher Freeman Subject: [PATCH v1 2/3] dma: tegra: change interrupt-related log levels Date: Tue, 6 May 2014 14:22:22 -0700 Message-ID: <1399411343-12222-3-git-send-email-cfreeman@nvidia.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399411343-12222-1-git-send-email-cfreeman@nvidia.com> References: <1399411343-12222-1-git-send-email-cfreeman@nvidia.com> MIME-Version: 1.0 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Log levels from info -> debug for a couple of interrupt related prints. Interrupts may be handled outside of the ISR when tx_status is called because they need to be handled before calculating the residual. Signed-off-by: Christopher Freeman --- drivers/dma/tegra20-apb-dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c index cc6b2fd..094e97d 100644 --- a/drivers/dma/tegra20-apb-dma.c +++ b/drivers/dma/tegra20-apb-dma.c @@ -675,7 +675,7 @@ static irqreturn_t tegra_dma_isr(int irq, void *dev_id) } spin_unlock_irqrestore(&tdc->lock, flags); - dev_info(tdc2dev(tdc), + dev_dbg(tdc2dev(tdc), "Interrupt already served status 0x%08lx\n", status); return IRQ_NONE; } @@ -796,7 +796,7 @@ static int tegra_dma_wcount_in_bytes(struct dma_chan *dc) status = tdc_read(tdc, TEGRA_APBDMA_CHAN_STATUS); if (status & TEGRA_APBDMA_STATUS_ISE_EOC) { tdc_write(tdc, TEGRA_APBDMA_CHAN_STATUS, status); - dev_info(tdc2dev(tdc), "%s():handling isr\n", __func__); + dev_dbg(tdc2dev(tdc), "%s():handling isr\n", __func__); tdc->isr_handler(tdc, false); tegra_dma_resume(tdc); return 0;