From patchwork Sat Sep 6 10:47:22 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 4857401 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 51792C0338 for ; Sat, 6 Sep 2014 10:55:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7E4FF20160 for ; Sat, 6 Sep 2014 10:55:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A5D8E2011B for ; Sat, 6 Sep 2014 10:55:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751368AbaIFKz2 (ORCPT ); Sat, 6 Sep 2014 06:55:28 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:49219 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751164AbaIFKzW (ORCPT ); Sat, 6 Sep 2014 06:55:22 -0400 Received: from mirror2.csie.ntu.edu.tw (mirror2.csie.ntu.edu.tw [140.112.30.76]) (Authenticated sender: b93043) by smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id D8D0C200FE; Sat, 6 Sep 2014 18:47:31 +0800 (CST) Received: by mirror2.csie.ntu.edu.tw (Postfix, from userid 1000) id A63D35F7E6; Sat, 6 Sep 2014 18:47:31 +0800 (CST) From: Chen-Yu Tsai To: Mike Turquette , Maxime Ripard , Emilio Lopez , Vinod Koul , Dan Williams , Grant Likely , Rob Herring Cc: Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/7] clk: sunxi: Add post clk divider for factor clocks Date: Sat, 6 Sep 2014 18:47:22 +0800 Message-Id: <1410000448-9999-2-git-send-email-wens@csie.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1410000448-9999-1-git-send-email-wens@csie.org> References: <1410000448-9999-1-git-send-email-wens@csie.org> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-8.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some factor clocks, mostly PLLs, have an extra fixed divider just before the clock output. Add an option to the factor clk driver config data to specify this divider. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- drivers/clk/sunxi/clk-factors.c | 3 +++ drivers/clk/sunxi/clk-factors.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c index 2057c8a..435111d 100644 --- a/drivers/clk/sunxi/clk-factors.c +++ b/drivers/clk/sunxi/clk-factors.c @@ -64,6 +64,9 @@ static unsigned long clk_factors_recalc_rate(struct clk_hw *hw, /* Calculate the rate */ rate = (parent_rate * (n + config->n_start) * (k + 1) >> p) / (m + 1); + if (config->post_div) + rate /= config->post_div; + return rate; } diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h index d2d0efa..ce70c65 100644 --- a/drivers/clk/sunxi/clk-factors.h +++ b/drivers/clk/sunxi/clk-factors.h @@ -16,6 +16,7 @@ struct clk_factors_config { u8 pshift; u8 pwidth; u8 n_start; + u8 post_div; }; struct clk_factors {