From patchwork Fri Nov 14 21:59:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 5309701 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A8BEBC11AC for ; Fri, 14 Nov 2014 22:00:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DC45120145 for ; Fri, 14 Nov 2014 22:00:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EBA96200E0 for ; Fri, 14 Nov 2014 22:00:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1422747AbaKNV7u (ORCPT ); Fri, 14 Nov 2014 16:59:50 -0500 Received: from mail-oi0-f73.google.com ([209.85.218.73]:58569 "EHLO mail-oi0-f73.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1422733AbaKNV7s (ORCPT ); Fri, 14 Nov 2014 16:59:48 -0500 Received: by mail-oi0-f73.google.com with SMTP id a141so334725oig.2 for ; Fri, 14 Nov 2014 13:59:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FvF4rnXVE7i2wIzjHKN6LdaF2fxbYp9jCTLMcqL7vY4=; b=QQ2XgZD7ClbhkubKhCYlXRzEI8CFkAtg9iRhfLFyHyVeEpC/cKaa3QsGr2gc7AjdqI 1KMOag71jRu5eOpXvIZb34xSJLiM1YX20nm6+osXFU7awkcmE1uwjUJtH73VmC+Zf6Pj zo3EgVhXmxCbMiegf4vl6GKiaZE3FPRtaHYbe+rzNMzHtdNdPAaCXUbJoQpq+u1J4q76 Xk4g9iVVH9OSzC6Nsa+PKdxzRn5RWMEYCD1a/jFnZQaL0XeRQ86c2DDTxf9NJxgVlEXb RA6ZSgVrluPZuLYgVFp7Ssy/vb54Z5vKJ0LgbvemItw24gnmQWZj1MjHmHvtZZP1ZnY7 vqrQ== X-Gm-Message-State: ALoCoQl2Cps4KS4qNREWPEFyZbNOu+c64/UgOYshvWfb3BIGpcUo++5DlJ0mQ88bJKSiiTG9hMYK X-Received: by 10.182.92.234 with SMTP id cp10mr54678555obb.49.1416002387868; Fri, 14 Nov 2014 13:59:47 -0800 (PST) Received: from corpmail-nozzle1-2.hot.corp.google.com ([100.108.1.103]) by gmr-mx.google.com with ESMTPS id lu9si4239163qcb.0.2014.11.14.13.59.46 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Nov 2014 13:59:47 -0800 (PST) Received: from abrestic.mtv.corp.google.com ([172.22.65.70]) by corpmail-nozzle1-2.hot.corp.google.com with ESMTP id QkMk2OZf.1; Fri, 14 Nov 2014 13:59:47 -0800 Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id E5186220A73; Fri, 14 Nov 2014 13:59:45 -0800 (PST) From: Andrew Bresticker To: Vinod Koul , Dan Williams Cc: Andrew Bresticker , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Grant Likely , James Hartley , James Hogan , Ezequiel Garcia , Damien Horsley , Arnd Bergmann , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 1/2] dmaengine: Add binding document for IMG MDC Date: Fri, 14 Nov 2014 13:59:42 -0800 Message-Id: <1416002384-3525-2-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1416002384-3525-1-git-send-email-abrestic@chromium.org> References: <1416002384-3525-1-git-send-email-abrestic@chromium.org> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a binding document for the IMG Multi-threaded DMA Controller (MDC) present on the MIPS-based Pistachio and other IMG SoCs. Signed-off-by: Andrew Bresticker Acked-by: Arnd Bergmann --- No changes from v1. --- .../devicetree/bindings/dma/img-mdc-dma.txt | 57 ++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/img-mdc-dma.txt diff --git a/Documentation/devicetree/bindings/dma/img-mdc-dma.txt b/Documentation/devicetree/bindings/dma/img-mdc-dma.txt new file mode 100644 index 0000000..28c1341 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/img-mdc-dma.txt @@ -0,0 +1,57 @@ +* IMG Multi-threaded DMA Controller (MDC) + +Required properties: +- compatible: Must be "img,pistachio-mdc-dma". +- reg: Must contain the base address and length of the MDC registers. +- interrupts: Must contain all the per-channel DMA interrupts. +- clocks: Must contain an entry for each entry in clock-names. + See ../clock/clock-bindings.txt for details. +- clock-names: Must include the following entries: + - sys: MDC system interface clock. +- img,cr-periph: Must contain a phandle to the peripheral control syscon + node which contains the DMA request to channel mapping registers. +- img,max-burst-multiplier: Must be the maximum supported burst size multiplier. + The maximum burst size is this value multiplied by the hardware-reported bus + width. +- #dma-cells: Must be 3: + - The first cell is the peripheral's DMA request line. + - The second cell is a bitmap specifying to which channels the DMA request + line may be mapped (i.e. bit N set indicates channel N is usable). + - The third cell is the thread ID to be used by the channel. + +Optional properties: +- dma-channels: Number of supported DMA channels, up to 32. If not specified + the number reported by the hardware is used. + +Example: + +mdc: dma-controller@18143000 { + compatible = "img,pistachio-mdc-dma"; + reg = <0x18143000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&system_clk>; + clock-names = "sys"; + + img,max-burst-multiplier = <16>; + img,cr-periph = <&cr_periph>; + + #dma-cells = <3>; +}; + +spi@18100f00 { + ... + dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>; + dma-names = "tx", "rx"; + ... +};