From patchwork Wed Mar 25 13:04:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Shimoda X-Patchwork-Id: 6090781 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8CDCE9F318 for ; Wed, 25 Mar 2015 13:04:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2853F20374 for ; Wed, 25 Mar 2015 13:04:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 102AD2034C for ; Wed, 25 Mar 2015 13:04:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752387AbbCYNEp (ORCPT ); Wed, 25 Mar 2015 09:04:45 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:38981 "EHLO relmlie1.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752291AbbCYNEo (ORCPT ); Wed, 25 Mar 2015 09:04:44 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie1.idc.renesas.com with ESMTP; 25 Mar 2015 22:04:43 +0900 Received: from relmlac4.idc.renesas.com (relmlac4.idc.renesas.com [10.200.69.24]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 374A34D291; Wed, 25 Mar 2015 22:04:43 +0900 (JST) Received: by relmlac4.idc.renesas.com (Postfix, from userid 0) id 3A2F9480A4; Wed, 25 Mar 2015 22:04:43 +0900 (JST) Received: from relmlac4.idc.renesas.com (localhost [127.0.0.1]) by relmlac4.idc.renesas.com (Postfix) with ESMTP id 331D2480A3; Wed, 25 Mar 2015 22:04:43 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac4.idc.renesas.com with ESMTP id YAC21375; Wed, 25 Mar 2015 22:04:43 +0900 X-IronPort-AV: E=Sophos;i="5.11,465,1422889200"; d="scan'208";a="183865623" Received: from mail-sg1lp0092.outbound.protection.outlook.com (HELO APAC01-SG1-obe.outbound.protection.outlook.com) ([207.46.51.92]) by relmlii2.idc.renesas.com with ESMTP/TLS/AES256-SHA; 25 Mar 2015 22:04:41 +0900 Received: from localhost (211.11.155.147) by SIXPR06MB333.apcprd06.prod.outlook.com (10.141.120.15) with Microsoft SMTP Server (TLS) id 15.1.118.21; Wed, 25 Mar 2015 13:04:40 +0000 From: Yoshihiro Shimoda To: , , , , , , , , , CC: , , , Yoshihiro Shimoda Subject: [PATCH v3 1/2] dmaengine: renesas, usb-dmac: Add device tree bindings documentation Date: Wed, 25 Mar 2015 22:04:26 +0900 Message-ID: <1427288667-5820-2-git-send-email-yoshihiro.shimoda.uh@renesas.com> X-Mailer: git-send-email 1.9.4.msysgit.1 In-Reply-To: <1427288667-5820-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> References: <1427288667-5820-1-git-send-email-yoshihiro.shimoda.uh@renesas.com> MIME-Version: 1.0 X-Originating-IP: [211.11.155.147] X-ClientProxiedBy: KAWPR01CA0025.jpnprd01.prod.outlook.com (25.161.24.35) To SIXPR06MB333.apcprd06.prod.outlook.com (10.141.120.15) Authentication-Results: intel.com; dkim=none (message not signed) header.d=none; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:SIXPR06MB333; X-Forefront-Antispam-Report: BMV:1; SFV:NSPM; SFS:(10019020)(6009001)(6069001)(2201001)(76176999)(77096005)(62966003)(36756003)(48376002)(33646002)(77156002)(50466002)(229853001)(40100003)(42186005)(66066001)(76506005)(19580405001)(2950100001)(122386002)(78352002)(46102003)(87976001)(50986999)(50226001)(42382002)(19580395003)(92566002)(47776003)(142933001)(921003)(1121003); DIR:OUT; SFP:1102; SCL:1; SRVR:SIXPR06MB333; H:localhost; FPR:; SPF:None; MLV:sfv; LANG:en; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5002010)(5005006); SRVR:SIXPR06MB333; BCL:0; PCL:0; RULEID:; SRVR:SIXPR06MB333; X-Forefront-PRVS: 052670E5A4 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Mar 2015 13:04:40.4539 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: SIXPR06MB333 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the device tree bindings for the Renesas USB DMA Controller (USB-DMAC). Signed-off-by: Yoshihiro Shimoda --- .../devicetree/bindings/dma/renesas,usb-dmac.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt diff --git a/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt b/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt new file mode 100644 index 0000000..040f365 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt @@ -0,0 +1,37 @@ +* Renesas USB DMA Controller Device Tree bindings + +Required Properties: +- compatible: must contain "renesas,usb-dmac" +- reg: base address and length of the registers block for the DMAC +- interrupts: interrupt specifiers for the DMAC, one for each entry in + interrupt-names. +- interrupt-names: one entry per channel, named "ch%u", where %u is the + channel number ranging from zero to the number of channels minus one. +- clocks: a list of phandle + clock-specifier pairs. +- #dma-cells: must be <1>, the cell specifies the channel number of the DMAC + port connected to the DMA client. +- dma-channels: number of DMA channels + +Example: R8A7790 (R-Car H2) USB-DMACs + + usb_dmac0: dma-controller@e65a0000 { + compatible = "renesas,usb-dmac"; + reg = <0 0xe65a0000 0 0x100>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH + 0 109 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch0", "ch1"; + clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>; + #dma-cells = <1>; + dma-channels = <2>; + }; + + usb_dmac1: dma-controller@e65b0000 { + compatible = "renesas,usb-dmac"; + reg = <0 0xe65b0000 0 0x100>; + interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH + 0 110 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch0", "ch1"; + clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>; + #dma-cells = <1>; + dma-channels = <2>; + };