From patchwork Wed Apr 15 05:39:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 6218751 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0FE23BF4A6 for ; Wed, 15 Apr 2015 05:40:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 186A5200E0 for ; Wed, 15 Apr 2015 05:40:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 059812017E for ; Wed, 15 Apr 2015 05:40:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932419AbbDOFkF (ORCPT ); Wed, 15 Apr 2015 01:40:05 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:34802 "EHLO mail-pa0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932230AbbDOFkD (ORCPT ); Wed, 15 Apr 2015 01:40:03 -0400 Received: by pacyx8 with SMTP id yx8so37959550pac.1; Tue, 14 Apr 2015 22:40:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=IVmYaiw527PDauZ2nt/Jiw5ogXDjlbpGesKfcqXRAyg=; b=zmEwEa9NRV6oA6PFVOKb/j54yAZIVJS8WwlVYPHCl7KM+u95YgbvNeN+45vutOtYvl SqAwY3VBQ8vAfwYz+lhgU5uV2iT25lEgr5zMl/8FQSXcaXjGqtZCTswLpt0auoyXimR7 4dfMyLmtYwALq/pwjcNSG3GCAOZcitShlKgZHA0yFqTYGjjHCNMcYykh1KT0sFRPWyan Y9zpPFjEzOIq/j0Uo7uqCIgGxTLsqxmYPGGnxtRHrsQgUSysGbllbb/s198lHQFm60uX 7O1SxY5i+BBD7xtZM6eZvci5x8mdRGx6mg44hyHEZLv6DrW68HMRhs2Wcpzt4Vmr25yO SPGQ== X-Received: by 10.66.172.4 with SMTP id ay4mr43632732pac.157.1429076402741; Tue, 14 Apr 2015 22:40:02 -0700 (PDT) Received: from Asurada-CZ80.hsd1.ca.comcast.net (c-73-189-64-245.hsd1.ca.comcast.net. [73.189.64.245]) by mx.google.com with ESMTPSA id cd10sm2853562pac.7.2015.04.14.22.40.01 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Apr 2015 22:40:02 -0700 (PDT) From: Nicolin Chen To: vinod.koul@intel.com, fabio.estevam@freescale.com, b38343@freescale.com Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, dan.j.williams@intel.com, s.hauer@pengutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Subject: [PATCH] dmaengine: imx-sdma: Add DMA event remapping for imx6sx-sdma Date: Tue, 14 Apr 2015 22:39:11 -0700 Message-Id: <1429076351-4429-1-git-send-email-nicoleotsuka@gmail.com> X-Mailer: git-send-email 1.9.1 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The SDMA on imx6sx has a few DMA event remapping configurations inside the GPR (General Purpose Register) of that SoC. When users want to use a non-default DMA event, they need to configure the GPR register. So this patch gives an interface of the GPR and implements it in the SDMA driver so as to finish the DMA event remapping. Signed-off-by: Nicolin Chen --- .../devicetree/bindings/dma/fsl-imx-sdma.txt | 9 ++++ drivers/dma/imx-sdma.c | 58 ++++++++++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt index dc8d3aa..03315a6 100644 --- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt +++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt @@ -8,6 +8,7 @@ Required properties: "fsl,imx51-sdma" "fsl,imx53-sdma" "fsl,imx6q-sdma" + "fsl,imx6sx-sdma" The -to variants should be preferred since they allow to determine the correct ROM script addresses needed for the driver to work without additional firmware. @@ -19,6 +20,14 @@ Required properties: - fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM scripts firmware +Optional properties: +- fsl, sdma-event-remap : List of one or more DMA event remapping + configurations. Its format: <&gpr addr shift val> + gpr : the gpr phandle + addr : the register address of the GPR + shift : the bit shift of the GPR register + val : the value of that bit + The second cell of dma phandle specifies the peripheral type of DMA transfer. The full ID of peripheral types can be found below. diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 62bbd79..f0339ab 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -39,6 +40,7 @@ #include #include +#include #include #include @@ -440,12 +442,16 @@ static struct platform_device_id sdma_devtypes[] = { .name = "imx6q-sdma", .driver_data = (unsigned long)&sdma_imx6q, }, { + .name = "imx6sx-sdma", + .driver_data = (unsigned long)&sdma_imx6q, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(platform, sdma_devtypes); static const struct of_device_id sdma_dt_ids[] = { + { .compatible = "fsl,imx6sx-sdma", .data = &sdma_imx6q, }, { .compatible = "fsl,imx6q-sdma", .data = &sdma_imx6q, }, { .compatible = "fsl,imx53-sdma", .data = &sdma_imx53, }, { .compatible = "fsl,imx51-sdma", .data = &sdma_imx51, }, @@ -1337,6 +1343,54 @@ err_firmware: release_firmware(fw); } +static int sdma_event_remap(struct sdma_engine *sdma) +{ + struct device_node *np = sdma->dev->of_node; + char propname[] = "fsl,sdma-event-remap"; + struct of_phandle_args gpr_spec; + struct regmap *gpr; + int i = 0, ret = 0; + + /* Only support DT */ + if (IS_ERR(np)) + return ret; + + /* Only apply to imx6sx platform */ + if (!of_device_is_compatible(np, "fsl,imx6sx-sdma")) + return ret; + + /* Bypass if no need to remap */ + if (!of_find_property(np, propname, NULL)) + return ret; + + /* Fetch the remap configurations of GPR */ + ret = of_parse_phandle_with_args(np, propname, "#gpr-cells", i++, + &gpr_spec); + if (ret) { + dev_err(sdma->dev, "failed to get a correct %s property: %d\n", + propname, ret); + return ret; + } + +next: + gpr = syscon_node_to_regmap(gpr_spec.np); + if (IS_ERR(gpr)) { + ret = PTR_ERR(gpr); + dev_err(sdma->dev, "failed to get gpr regmap: %d\n", reg); + return ret; + } + + /* 0 : Register address, 1 : Bit shift, 2 : Bit value */ + regmap_update_bits(gpr, gpr_spec.args[0], BIT(gpr_spec.args[1]), + gpr_spec.args[2] << gpr_spec.args[1]); + + if (!of_parse_phandle_with_args(np, propname, "#gpr-cells", i++, + &gpr_spec)) + goto next; + + return ret; +} + static int sdma_get_firmware(struct sdma_engine *sdma, const char *fw_name) { @@ -1551,6 +1605,10 @@ static int sdma_probe(struct platform_device *pdev) if (ret) goto err_init; + ret = sdma_event_remap(sdma); + if (ret) + goto err_init; + if (sdma->drvdata->script_addrs) sdma_add_scripts(sdma, sdma->drvdata->script_addrs); if (pdata && pdata->script_addrs)