From patchwork Tue Jul 21 03:01:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Nie X-Patchwork-Id: 6832001 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5E94D9F1D4 for ; Tue, 21 Jul 2015 03:01:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7B45120690 for ; Tue, 21 Jul 2015 03:01:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 98695206BA for ; Tue, 21 Jul 2015 03:01:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752562AbbGUDBZ (ORCPT ); Mon, 20 Jul 2015 23:01:25 -0400 Received: from mail-pd0-f177.google.com ([209.85.192.177]:35881 "EHLO mail-pd0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752000AbbGUDBY (ORCPT ); Mon, 20 Jul 2015 23:01:24 -0400 Received: by pdjr16 with SMTP id r16so113458187pdj.3 for ; Mon, 20 Jul 2015 20:01:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=3w/ACyZ3DYad84xQ0wWS3H3uL/SA/Dz7P3v2jHVzivo=; b=mAlJKu6MCnKKFa2RpxyDhiTyV5/2d5jKjjUKAp+DJFJj/25xaCe4thBMAuy1R83Hz7 6f7ujSpiQXeIlGh6GYZMo+4wM8Kks/mFhtWYjulSTCWzwHV3d9V2a5UfaeXWnU4U19eS mFFN40h+rIgYtC0/ZTF970/FpKKyDCJ/NObXaqnQWp/xP1snBfP/eE6pxzJK/rwDBPNa w9gE+6ObYIM1seilLQJg3jspr+wsfLzxSQVj51LZW+4I1QlKv0I25TYzHGIJYbaqymVs auk31ON3ohL9QuFU1e+8mYxApCWS6p5Jrqb9hZ08h8nnJw4fc4rngwI+DhfWfYiaf056 GL1Q== X-Gm-Message-State: ALoCoQnYcdbvuActEyjHe8bMw2OlM8DUNLrCsuhSMzd1sgQVrNsKPvkyKLulamk0DD8MAV06QOyz X-Received: by 10.70.48.68 with SMTP id j4mr67255376pdn.111.1437447684263; Mon, 20 Jul 2015 20:01:24 -0700 (PDT) Received: from localhost.localdomain ([107.6.117.178]) by smtp.gmail.com with ESMTPSA id ml10sm24424659pab.47.2015.07.20.20.01.18 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 20 Jul 2015 20:01:22 -0700 (PDT) From: Jun Nie To: maxime.ripard@free-electrons.com, vinod.koul@intel.com, dmaengine@vger.kernel.org Cc: shawn.guo@linaro.org, wan.zhijun@zte.com.cn, Jun Nie Subject: [PATCH 1/2] dmaengine: zxdma: Fix data width bug Date: Tue, 21 Jul 2015 11:01:05 +0800 Message-Id: <1437447666-7012-1-git-send-email-jun.nie@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Align src and dst width to fix data alignment issue. Hardware burst length limitation can be addressed well too. Signed-off-by: Jun Nie --- drivers/dma/zx296702_dma.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/dma/zx296702_dma.c b/drivers/dma/zx296702_dma.c index ec470bc..4757f74 100644 --- a/drivers/dma/zx296702_dma.c +++ b/drivers/dma/zx296702_dma.c @@ -143,6 +143,7 @@ static void zx_dma_terminate_chan(struct zx_dma_phy *phy, struct zx_dma_dev *d) val = readl_relaxed(phy->base + REG_ZX_CTRL); val &= ~ZX_CH_ENABLE; + val |= ZX_FORCE_CLOSE; writel_relaxed(val, phy->base + REG_ZX_CTRL); val = 0x1 << phy->idx; @@ -475,13 +476,12 @@ static int zx_pre_config(struct zx_dma_chan *c, enum dma_transfer_direction dir) * We need make sure dst len not exceed MAX LEN. */ dst_width = zx_dma_burst_width(cfg->dst_addr_width); - maxburst = cfg->dst_maxburst * cfg->dst_addr_width - / DMA_SLAVE_BUSWIDTH_8_BYTES; + maxburst = cfg->dst_maxburst; maxburst = maxburst < ZX_MAX_BURST_LEN ? maxburst : ZX_MAX_BURST_LEN; c->ccfg = ZX_DST_FIFO_MODE | ZX_CH_ENABLE | ZX_SRC_BURST_LEN(maxburst - 1) - | ZX_SRC_BURST_WIDTH(ZX_DMA_WIDTH_64BIT) + | ZX_SRC_BURST_WIDTH(dst_width) | ZX_DST_BURST_WIDTH(dst_width); break; case DMA_DEV_TO_MEM: @@ -493,7 +493,7 @@ static int zx_pre_config(struct zx_dma_chan *c, enum dma_transfer_direction dir) c->ccfg = ZX_SRC_FIFO_MODE | ZX_CH_ENABLE | ZX_SRC_BURST_LEN(maxburst - 1) | ZX_SRC_BURST_WIDTH(src_width) - | ZX_DST_BURST_WIDTH(ZX_DMA_WIDTH_64BIT); + | ZX_DST_BURST_WIDTH(src_width); break; default: return -EINVAL;