From patchwork Thu Sep 10 08:37:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 7152551 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D901A9F326 for ; Thu, 10 Sep 2015 08:45:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ECF04208BF for ; Thu, 10 Sep 2015 08:45:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 54500208C5 for ; Thu, 10 Sep 2015 08:45:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755024AbbIJIpQ (ORCPT ); Thu, 10 Sep 2015 04:45:16 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:39819 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753666AbbIJIiw (ORCPT ); Thu, 10 Sep 2015 04:38:52 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id t8A8cLAX017090; Thu, 10 Sep 2015 03:38:21 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8A8cLvP031700; Thu, 10 Sep 2015 03:38:21 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Thu, 10 Sep 2015 03:38:12 -0500 Received: from dlep32.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8A8bqKv018732; Thu, 10 Sep 2015 03:38:18 -0500 From: Peter Ujfalusi To: , , CC: , , , , , Subject: [PATCH 08/21] ARM/dmaengine: edma: Remove limitation on the number of eDMA controllers Date: Thu, 10 Sep 2015 11:37:37 +0300 Message-ID: <1441874270-2399-9-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.5.1 In-Reply-To: <1441874270-2399-1-git-send-email-peter.ujfalusi@ti.com> References: <1441874270-2399-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP bla-bla and bla Signed-off-by: Peter Ujfalusi --- arch/arm/common/edma.c | 22 +++++----------------- drivers/dma/edma.c | 17 ++++++++--------- 2 files changed, 13 insertions(+), 26 deletions(-) diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c index 15b68ce98ec7..0f29997c62df 100644 --- a/arch/arm/common/edma.c +++ b/arch/arm/common/edma.c @@ -1227,24 +1227,7 @@ static int edma_probe(struct platform_device *pdev) .parent = &pdev->dev, }; - /* When booting with DT the pdev->id is -1 */ - if (dev_id < 0) - dev_id = arch_num_cc; - - if (dev_id >= EDMA_MAX_CC) { - dev_err(dev, - "eDMA3 with device id 0 and 1 is supported (id: %d)\n", - dev_id); - return -EINVAL; - } - if (node) { - /* Check if this is a second instance registered */ - if (arch_num_cc) { - dev_err(dev, "only one EDMA instance is supported via DT\n"); - return -ENODEV; - } - info = edma_setup_info_from_dt(dev, node); if (IS_ERR(info)) { dev_err(dev, "failed to get DT data\n"); @@ -1278,6 +1261,11 @@ static int edma_probe(struct platform_device *pdev) cc->dev = dev; cc->id = dev_id; + /* When booting with DT the pdev->id is -1 */ + if (dev_id < 0) { + cc->id = 0; + dev_id = arch_num_cc; + } dev_set_drvdata(dev, cc); cc->base = devm_ioremap_resource(dev, mem); diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index 53d48b2a700d..fc91ab9dd1bb 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -991,14 +991,12 @@ static void edma_dma_init(struct edma_cc *ecc, struct dma_device *dma, INIT_LIST_HEAD(&dma->channels); } -static struct of_dma_filter_info edma_filter_info = { - .filter_fn = edma_filter_fn, -}; - static int edma_probe(struct platform_device *pdev) { struct edma_cc *ecc; struct device_node *parent_node = pdev->dev.parent->of_node; + struct platform_device *parent_pdev = + to_platform_device(pdev->dev.parent); int ret; ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); @@ -1015,7 +1013,10 @@ static int edma_probe(struct platform_device *pdev) if (!ecc->cc) return -ENODEV; - ecc->ctlr = pdev->id; + ecc->ctlr = parent_pdev->id; + if (ecc->ctlr < 0) + ecc->ctlr = 0; + ecc->dummy_slot = edma_alloc_slot(ecc->cc, EDMA_SLOT_ANY); if (ecc->dummy_slot < 0) { dev_err(&pdev->dev, "Can't allocate PaRAM dummy slot\n"); @@ -1038,10 +1039,8 @@ static int edma_probe(struct platform_device *pdev) platform_set_drvdata(pdev, ecc); if (parent_node) { - dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap); - dma_cap_set(DMA_CYCLIC, edma_filter_info.dma_cap); - of_dma_controller_register(parent_node, of_dma_simple_xlate, - &edma_filter_info); + of_dma_controller_register(parent_node, of_dma_xlate_by_chan_id, + &ecc->dma_slave); } dev_info(&pdev->dev, "TI EDMA DMA engine driver\n");