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[174.45.44.32]) by smtp.gmail.com with ESMTPSA id oj9sm77417812pab.8.2016.01.07.10.07.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 07 Jan 2016 10:07:42 -0800 (PST) From: tim.gardner@canonical.com To: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Tim Gardner , Vinod Koul , Dan Williams , Dave Jiang , Prarit Bhargava , Nicholas Mc Guire , Jarkko Nikula Subject: [PATCH v4.4-rc8] dmaengine: ioatdma: Squelch framesize warnings Date: Thu, 7 Jan 2016 11:07:30 -0700 Message-Id: <1452190050-11296-1-git-send-email-tim.gardner@canonical.com> X-Mailer: git-send-email 1.9.1 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tim Gardner CC [M] drivers/dma/ioat/prep.o drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor': drivers/dma/ioat/prep.c:682:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=] } ^ drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor_val': drivers/dma/ioat/prep.c:714:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=] } gcc version 5.3.1 20151219 (Ubuntu 5.3.1-4ubuntu1) Cc: Vinod Koul Cc: Dan Williams Cc: Dave Jiang Cc: Prarit Bhargava Cc: Nicholas Mc Guire Cc: Jarkko Nikula Signed-off-by: Tim Gardner --- drivers/dma/ioat/prep.c | 30 ++++++++++++++++++++++-------- 1 file changed, 22 insertions(+), 8 deletions(-) diff --git a/drivers/dma/ioat/prep.c b/drivers/dma/ioat/prep.c index 6bb4a13..ff62763 100644 --- a/drivers/dma/ioat/prep.c +++ b/drivers/dma/ioat/prep.c @@ -655,30 +655,41 @@ ioat_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, flags); } +static char *ioat_alloc_scf(unsigned int src_cnt) +{ + if (!src_cnt || src_cnt > MAX_SCF) + return NULL; + + return kzalloc(src_cnt, GFP_KERNEL); +} + struct dma_async_tx_descriptor * ioat_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, unsigned int src_cnt, size_t len, unsigned long flags) { - unsigned char scf[MAX_SCF]; + unsigned char *scf; dma_addr_t pq[2]; struct ioatdma_chan *ioat_chan = to_ioat_chan(chan); + struct dma_async_tx_descriptor *desc; if (test_bit(IOAT_CHAN_DOWN, &ioat_chan->state)) return NULL; - if (src_cnt > MAX_SCF) + scf = ioat_alloc_scf(src_cnt); + if (!scf) return NULL; - memset(scf, 0, src_cnt); pq[0] = dst; flags |= DMA_PREP_PQ_DISABLE_Q; pq[1] = dst; /* specify valid address for disabled result */ - return src_cnt_flags(src_cnt, flags) > 8 ? + desc = src_cnt_flags(src_cnt, flags) > 8 ? __ioat_prep_pq16_lock(chan, NULL, pq, src, src_cnt, scf, len, flags) : __ioat_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len, flags); + kfree(scf); + return desc; } struct dma_async_tx_descriptor * @@ -686,14 +697,16 @@ ioat_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, size_t len, enum sum_check_flags *result, unsigned long flags) { - unsigned char scf[MAX_SCF]; + unsigned char *scf; dma_addr_t pq[2]; struct ioatdma_chan *ioat_chan = to_ioat_chan(chan); + struct dma_async_tx_descriptor *desc; if (test_bit(IOAT_CHAN_DOWN, &ioat_chan->state)) return NULL; - if (src_cnt > MAX_SCF) + scf = ioat_alloc_scf(src_cnt); + if (!scf) return NULL; /* the cleanup routine only sets bits on validate failure, it @@ -701,16 +714,17 @@ ioat_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src, */ *result = 0; - memset(scf, 0, src_cnt); pq[0] = src[0]; flags |= DMA_PREP_PQ_DISABLE_Q; pq[1] = pq[0]; /* specify valid address for disabled result */ - return src_cnt_flags(src_cnt, flags) > 8 ? + desc = src_cnt_flags(src_cnt, flags) > 8 ? __ioat_prep_pq16_lock(chan, result, pq, &src[1], src_cnt - 1, scf, len, flags) : __ioat_prep_pq_lock(chan, result, pq, &src[1], src_cnt - 1, scf, len, flags); + kfree(scf); + return desc; } struct dma_async_tx_descriptor *