| Message ID | 1452260149-29576-1-git-send-email-tim.gardner@canonical.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
On Fri, Jan 8, 2016 at 5:35 AM, <tim.gardner@canonical.com> wrote: > From: Tim Gardner <tim.gardner@canonical.com> > > CC [M] drivers/dma/ioat/prep.o > drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor': > drivers/dma/ioat/prep.c:682:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=] > } > ^ > drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor_val': > drivers/dma/ioat/prep.c:714:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=] > } > > gcc version 5.3.1 20151219 (Ubuntu 5.3.1-4ubuntu1) > > Cc: Vinod Koul <vinod.koul@intel.com> > Cc: Dan Williams <dan.j.williams@intel.com> > Cc: Dave Jiang <dave.jiang@intel.com> > Cc: Prarit Bhargava <prarit@redhat.com> > Cc: Nicholas Mc Guire <der.herr@hofr.at> > Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> > Signed-off-by: Tim Gardner <tim.gardner@canonical.com> > --- > > v2 - use per CPU static buffers instead of dynamically allocating memory. > > drivers/dma/ioat/prep.c | 33 +++++++++++++++++++++++++++++---- > 1 file changed, 29 insertions(+), 4 deletions(-) > > diff --git a/drivers/dma/ioat/prep.c b/drivers/dma/ioat/prep.c > index 6bb4a13..2c0768b 100644 > --- a/drivers/dma/ioat/prep.c > +++ b/drivers/dma/ioat/prep.c > @@ -21,6 +21,8 @@ > #include <linux/dmaengine.h> > #include <linux/dma-mapping.h> > #include <linux/prefetch.h> > +#include <linux/percpu.h> > +#include <linux/preempt.h> > #include "../dmaengine.h" > #include "registers.h" > #include "hw.h" > @@ -655,13 +657,25 @@ ioat_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, > flags); > } > > +/* > + * The scf scratch buffer is too large for an automatic variable, and > + * we don't want to take the performance hit for dynamic allocation. > + * Therefore, define per CPU buffers and disable preemption while in use. > + */ > +static DEFINE_PER_CPU(unsigned char [MAX_SCF], ioat_scf); > +static inline unsigned char *ioat_assign_scratch_buffer(void) > +{ > + return get_cpu_var(ioat_scf); This get needs to be paired with a put_cpu_var(). > +} > + > struct dma_async_tx_descriptor * > ioat_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, > unsigned int src_cnt, size_t len, unsigned long flags) > { > - unsigned char scf[MAX_SCF]; > + unsigned char *scf; > dma_addr_t pq[2]; > struct ioatdma_chan *ioat_chan = to_ioat_chan(chan); > + struct dma_async_tx_descriptor *desc; > > if (test_bit(IOAT_CHAN_DOWN, &ioat_chan->state)) > return NULL; > @@ -669,16 +683,21 @@ ioat_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, > if (src_cnt > MAX_SCF) > return NULL; > > + preempt_disable(); preempt_disable() is embedded in get_cpu_var(), no need to open code it. > + scf = ioat_assign_scratch_buffer(); > + > memset(scf, 0, src_cnt); > pq[0] = dst; > flags |= DMA_PREP_PQ_DISABLE_Q; > pq[1] = dst; /* specify valid address for disabled result */ > > - return src_cnt_flags(src_cnt, flags) > 8 ? > + desc = src_cnt_flags(src_cnt, flags) > 8 ? > __ioat_prep_pq16_lock(chan, NULL, pq, src, src_cnt, scf, len, > flags) : > __ioat_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len, > flags); > + preempt_enable(); put_cpu_var()... -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/dma/ioat/prep.c b/drivers/dma/ioat/prep.c index 6bb4a13..2c0768b 100644 --- a/drivers/dma/ioat/prep.c +++ b/drivers/dma/ioat/prep.c @@ -21,6 +21,8 @@ #include <linux/dmaengine.h> #include <linux/dma-mapping.h> #include <linux/prefetch.h> +#include <linux/percpu.h> +#include <linux/preempt.h> #include "../dmaengine.h" #include "registers.h" #include "hw.h" @@ -655,13 +657,25 @@ ioat_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, flags); } +/* + * The scf scratch buffer is too large for an automatic variable, and + * we don't want to take the performance hit for dynamic allocation. + * Therefore, define per CPU buffers and disable preemption while in use. + */ +static DEFINE_PER_CPU(unsigned char [MAX_SCF], ioat_scf); +static inline unsigned char *ioat_assign_scratch_buffer(void) +{ + return get_cpu_var(ioat_scf); +} + struct dma_async_tx_descriptor * ioat_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, unsigned int src_cnt, size_t len, unsigned long flags) { - unsigned char scf[MAX_SCF]; + unsigned char *scf; dma_addr_t pq[2]; struct ioatdma_chan *ioat_chan = to_ioat_chan(chan); + struct dma_async_tx_descriptor *desc; if (test_bit(IOAT_CHAN_DOWN, &ioat_chan->state)) return NULL; @@ -669,16 +683,21 @@ ioat_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, if (src_cnt > MAX_SCF) return NULL; + preempt_disable(); + scf = ioat_assign_scratch_buffer(); + memset(scf, 0, src_cnt); pq[0] = dst; flags |= DMA_PREP_PQ_DISABLE_Q; pq[1] = dst; /* specify valid address for disabled result */ - return src_cnt_flags(src_cnt, flags) > 8 ? + desc = src_cnt_flags(src_cnt, flags) > 8 ? __ioat_prep_pq16_lock(chan, NULL, pq, src, src_cnt, scf, len, flags) : __ioat_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len, flags); + preempt_enable(); + return desc; } struct dma_async_tx_descriptor * @@ -686,9 +705,10 @@ ioat_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, size_t len, enum sum_check_flags *result, unsigned long flags) { - unsigned char scf[MAX_SCF]; + unsigned char *scf; dma_addr_t pq[2]; struct ioatdma_chan *ioat_chan = to_ioat_chan(chan); + struct dma_async_tx_descriptor *desc; if (test_bit(IOAT_CHAN_DOWN, &ioat_chan->state)) return NULL; @@ -696,6 +716,9 @@ ioat_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src, if (src_cnt > MAX_SCF) return NULL; + preempt_disable(); + scf = ioat_assign_scratch_buffer(); + /* the cleanup routine only sets bits on validate failure, it * does not clear bits on validate success... so clear it here */ @@ -706,11 +729,13 @@ ioat_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src, flags |= DMA_PREP_PQ_DISABLE_Q; pq[1] = pq[0]; /* specify valid address for disabled result */ - return src_cnt_flags(src_cnt, flags) > 8 ? + desc = src_cnt_flags(src_cnt, flags) > 8 ? __ioat_prep_pq16_lock(chan, result, pq, &src[1], src_cnt - 1, scf, len, flags) : __ioat_prep_pq_lock(chan, result, pq, &src[1], src_cnt - 1, scf, len, flags); + preempt_enable(); + return desc; } struct dma_async_tx_descriptor *