From patchwork Mon Feb 29 23:15:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 8460141 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id F0EC49F52D for ; Mon, 29 Feb 2016 23:15:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 248DD2022A for ; Mon, 29 Feb 2016 23:15:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3766C20204 for ; Mon, 29 Feb 2016 23:15:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753894AbcB2XPb (ORCPT ); Mon, 29 Feb 2016 18:15:31 -0500 Received: from mail-ob0-f178.google.com ([209.85.214.178]:36629 "EHLO mail-ob0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750956AbcB2XPa (ORCPT ); Mon, 29 Feb 2016 18:15:30 -0500 Received: by mail-ob0-f178.google.com with SMTP id s6so99676554obg.3 for ; Mon, 29 Feb 2016 15:15:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=0qYbPPb546EUjLmwWQsb2Ai3obP1aZEoWrwFFmf5dSU=; b=ZdK5yOfx0ptnc9fBc2wxgoQjc6cYhb643KJ6DYTOPayseuU6pCAe3qHU9CqgDQSG4Q 8f2O2HroCGVXF6vXLG7Wp6Ux5rVFGkNuyyWzd+Y83wdurd8kk0YPTDSpWu1iC2TGbIPZ wjhcJfG1dIvjwJmtyoxz/FhT0HInhs3HGgTiY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=0qYbPPb546EUjLmwWQsb2Ai3obP1aZEoWrwFFmf5dSU=; b=T1ryIgdHU3KhfyobzICF6pz0n/JZ3vgloEf1xjaiA4/7cjiKqZkq8UeihXitSJgSQT VuQ3v7ysuEZnPnViQxsZ7fast9G4+c0i4ieQ0hjHc6vs3QID+yrGhmq6+HfHfArc6cdS B5/fJQ0wNPpHHcI3UQyyR8ql4jooCdavEmCoAf3i5grMxGD4b6ATUvgpShHiu7rz0+sm kQd+mu/PdsPdLCOHnzx9AeS0zNTzdQr1EmggTyzermt4LLlH4uwT+S+GkWaI9f1yjHRt Xa0+ltIjWCh2V/H4dOnzPuMWEZRo62ES0mYlrNG2GBLtCyuEE0GbPDw7Hh2jVGPGp5el HsSw== X-Gm-Message-State: AD7BkJKmi4EN1yX3KE3eAGmamQ+0Cx6JFITw3Cox5dQxCZa3MrrDRWtKprLDrb/TVhzQaOTN X-Received: by 10.182.131.202 with SMTP id oo10mr14796480obb.72.1456787729878; Mon, 29 Feb 2016 15:15:29 -0800 (PST) Received: from Agamemnon.attlocal.net (108-85-129-155.lightspeed.austtx.sbcglobal.net. [108.85.129.155]) by smtp.gmail.com with ESMTPSA id y196sm19715522oia.24.2016.02.29.15.15.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 29 Feb 2016 15:15:29 -0800 (PST) From: Andy Gross To: Vinod Koul Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-kernel@lists.linaro.org, dmaengine@vger.kernel.org, Andy Gross Subject: [PATCH] dmaengine: qcom_bam_dma: Make driver work for BE Date: Mon, 29 Feb 2016 17:15:19 -0600 Message-Id: <1456787719-28270-1-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch fixes the Qualcomm BAM dmaenging driver to work with big endian kernels. Signed-off-by: Andy Gross --- drivers/dma/qcom_bam_dma.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/dma/qcom_bam_dma.c b/drivers/dma/qcom_bam_dma.c index 5a250cd..37f7aec 100644 --- a/drivers/dma/qcom_bam_dma.c +++ b/drivers/dma/qcom_bam_dma.c @@ -53,9 +53,9 @@ #include "virt-dma.h" struct bam_desc_hw { - u32 addr; /* Buffer physical address */ - u16 size; /* Buffer size in bytes */ - u16 flags; + __le32 addr; /* Buffer physical address */ + __le16 size; /* Buffer size in bytes */ + __le16 flags; }; #define DESC_FLAG_INT BIT(15) @@ -632,14 +632,15 @@ static struct dma_async_tx_descriptor *bam_prep_slave_sg(struct dma_chan *chan, unsigned int curr_offset = 0; do { - desc->addr = sg_dma_address(sg) + curr_offset; + desc->addr = cpu_to_le32(sg_dma_address(sg) + + curr_offset); if (remainder > BAM_MAX_DATA_SIZE) { - desc->size = BAM_MAX_DATA_SIZE; + desc->size = cpu_to_le16(BAM_MAX_DATA_SIZE); remainder -= BAM_MAX_DATA_SIZE; curr_offset += BAM_MAX_DATA_SIZE; } else { - desc->size = remainder; + desc->size = cpu_to_le16(remainder); remainder = 0; } @@ -915,9 +916,11 @@ static void bam_start_dma(struct bam_chan *bchan) /* set any special flags on the last descriptor */ if (async_desc->num_desc == async_desc->xfer_len) - desc[async_desc->xfer_len - 1].flags = async_desc->flags; + desc[async_desc->xfer_len - 1].flags = + cpu_to_le16(async_desc->flags); else - desc[async_desc->xfer_len - 1].flags |= DESC_FLAG_INT; + desc[async_desc->xfer_len - 1].flags |= + cpu_to_le16(DESC_FLAG_INT); if (bchan->tail + async_desc->xfer_len > MAX_DESCRIPTORS) { u32 partial = MAX_DESCRIPTORS - bchan->tail;