From patchwork Fri Apr 8 11:42:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keguang Zhang X-Patchwork-Id: 8783041 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 016FC9F39A for ; Fri, 8 Apr 2016 11:43:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 01CA3202BE for ; Fri, 8 Apr 2016 11:43:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A388C20295 for ; Fri, 8 Apr 2016 11:43:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758225AbcDHLnY (ORCPT ); Fri, 8 Apr 2016 07:43:24 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:35758 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753147AbcDHLnX (ORCPT ); Fri, 8 Apr 2016 07:43:23 -0400 Received: by mail-pf0-f194.google.com with SMTP id r187so9400517pfr.2; Fri, 08 Apr 2016 04:43:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=VACHnLkxMm+PDQTwV3M78XBf2fo3YqZm5MiTMHtkgWE=; b=b0m1Kf7qcmB/uJ2E4dVHYu0rz0RZ6o7Ic9rLdJ+ruRmfDsrhkix7uPdcU0wL8I9lj/ WzgZzSLBn9XnAyKsLBazjIdSDag22HmNgwcADeqEDgRx3dB9XrjOsK3x0XJMU5M/fgkd OrSMTYx6lQJPoRgOYAge/aH/Ue0YV7RXYA6d7wN3SSMjiAv4mt/DlM9nWkzPSv96y65W I9H0Zv+MgjdEjTKnbekHbLEcLF11Fmzondj0jqb4LaRg//sYYL0pHVOHqBZYC9fFymfh kBuyE5F7Zn7/pHMpmJPpbjh/A4IAigzWyXqlGzQRAHQ6ERWoVJDdohtgdZZmoB0Szha7 wI6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=VACHnLkxMm+PDQTwV3M78XBf2fo3YqZm5MiTMHtkgWE=; b=aTpdWPCdwPrE6YQbNOjLH0xgUZyS+BpMjJgeqIBQyi2ERY7YwId0o6gAjggd5ysHOU G43t0FyWo+aKLP7nN7YFvCd97SH9mhkbuNv20OY6GqqlW2YslFv6rqlwgRk36eDbsQtq 8F34/ta1Z/xftP/7ncfwZVk/dOyBngAxvcn/8SyWzlY8vBCz9uKUESESTn3P0TrDcj0a X6zoT6noLSYQNPcIQ6D8xRbwjVGNAIoFSnK3mpu26pZGZ1z+hExxrFjmAR7oIgLMqitt ZwkzJy0mML3ppM+V7T90Pvbqc3QXm7bX9mlpXSnrJBybSEVxuu5XQx4KXMfzyR2/EBTU zk/A== X-Gm-Message-State: AD7BkJJk6tPlE4cOoR2jxHKKQo7Y3Ne1Lz3z21wsNlmLKj/HO9VpzZ5XOKbYPdzsDtxyVQ== X-Received: by 10.98.71.70 with SMTP id u67mr12158194pfa.85.1460115801600; Fri, 08 Apr 2016 04:43:21 -0700 (PDT) Received: from localhost.localdomain ([175.111.195.49]) by smtp.gmail.com with ESMTPSA id p75sm18350744pfi.29.2016.04.08.04.43.15 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 08 Apr 2016 04:43:20 -0700 (PDT) From: Keguang Zhang To: linux-mips@linux-mips.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, dmaengine@vger.kernel.org, linux-gpio@vger.kernel.org, linux-mtd@lists.infradead.org Cc: Ralf Baechle , Michael Turquette , Stephen Boyd , "Rafael J. Wysocki" , Viresh Kumar , Vinod Koul , Dan Williams , Linus Walleij , Alexandre Courbot , Boris Brezillon , Richard Weinberger , David Woodhouse , Brian Norris , Kelvin Cheung Subject: [PATCH V2 1/7] clk: Loongson1: Update clocks of Loongson1B Date: Fri, 8 Apr 2016 19:42:55 +0800 Message-Id: <1460115779-13141-1-git-send-email-keguang.zhang@gmail.com> X-Mailer: git-send-email 1.9.1 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kelvin Cheung - Rename the file to clk-loongson1.c - Add AC97, DMA and NAND clock - Update clock names - Remove superfluous error messages Signed-off-by: Kelvin Cheung --- V2: Regenerate the patch to make it review-able. --- drivers/clk/Makefile | 2 +- drivers/clk/{clk-ls1x.c => clk-loongson1.c} | 25 +++++++++++++------------ 2 files changed, 14 insertions(+), 13 deletions(-) rename drivers/clk/{clk-ls1x.c => clk-loongson1.c} (86%) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 46869d6..5845b2c 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -25,7 +25,7 @@ obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o -obj-$(CONFIG_MACH_LOONGSON32) += clk-ls1x.o +obj-$(CONFIG_MACH_LOONGSON32) += clk-loongson1.o obj-$(CONFIG_COMMON_CLK_MAX_GEN) += clk-max-gen.o obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o obj-$(CONFIG_COMMON_CLK_MAX77802) += clk-max77802.o diff --git a/drivers/clk/clk-ls1x.c b/drivers/clk/clk-loongson1.c similarity index 86% rename from drivers/clk/clk-ls1x.c rename to drivers/clk/clk-loongson1.c index d4c6198..ce2135c 100644 --- a/drivers/clk/clk-ls1x.c +++ b/drivers/clk/clk-loongson1.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012 Zhang, Keguang + * Copyright (c) 2012-2016 Zhang, Keguang * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -58,11 +58,9 @@ static struct clk *__init clk_register_pll(struct device *dev, struct clk_init_data init; /* allocate the divider */ - hw = kzalloc(sizeof(struct clk_hw), GFP_KERNEL); - if (!hw) { - pr_err("%s: could not allocate clk_hw\n", __func__); + hw = kzalloc(sizeof(*hw), GFP_KERNEL); + if (!hw) return ERR_PTR(-ENOMEM); - } init.name = name; init.ops = &ls1x_pll_clk_ops; @@ -80,9 +78,9 @@ static struct clk *__init clk_register_pll(struct device *dev, return clk; } -static const char * const cpu_parents[] = { "cpu_clk_div", "osc_33m_clk", }; -static const char * const ahb_parents[] = { "ahb_clk_div", "osc_33m_clk", }; -static const char * const dc_parents[] = { "dc_clk_div", "osc_33m_clk", }; +static const char *const cpu_parents[] = { "cpu_clk_div", "osc_33m_clk", }; +static const char *const ahb_parents[] = { "ahb_clk_div", "osc_33m_clk", }; +static const char *const dc_parents[] = { "dc_clk_div", "osc_33m_clk", }; void __init ls1x_clk_init(void) { @@ -147,6 +145,7 @@ void __init ls1x_clk_init(void) CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV, BYPASS_DDR_SHIFT, BYPASS_DDR_WIDTH, 0, &_lock); clk_register_clkdev(clk, "ahb_clk", NULL); + clk_register_clkdev(clk, "ls1x-dma", NULL); clk_register_clkdev(clk, "stmmaceth", NULL); /* clock derived from AHB clk */ @@ -154,9 +153,11 @@ void __init ls1x_clk_init(void) clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1, DIV_APB); clk_register_clkdev(clk, "apb_clk", NULL); - clk_register_clkdev(clk, "ls1x_i2c", NULL); - clk_register_clkdev(clk, "ls1x_pwmtimer", NULL); - clk_register_clkdev(clk, "ls1x_spi", NULL); - clk_register_clkdev(clk, "ls1x_wdt", NULL); + clk_register_clkdev(clk, "ls1x-ac97", NULL); + clk_register_clkdev(clk, "ls1x-i2c", NULL); + clk_register_clkdev(clk, "ls1x-nand", NULL); + clk_register_clkdev(clk, "ls1x-pwmtimer", NULL); + clk_register_clkdev(clk, "ls1x-spi", NULL); + clk_register_clkdev(clk, "ls1x-wdt", NULL); clk_register_clkdev(clk, "serial8250", NULL); }