From patchwork Tue Jun 7 10:28:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: charanya@codeaurora.org X-Patchwork-Id: 9160243 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A34F060572 for ; Tue, 7 Jun 2016 10:29:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 934BC2656B for ; Tue, 7 Jun 2016 10:29:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8762F28179; Tue, 7 Jun 2016 10:29:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 11AE62656B for ; Tue, 7 Jun 2016 10:29:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754992AbcFGK3G (ORCPT ); Tue, 7 Jun 2016 06:29:06 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:58344 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753361AbcFGK3E (ORCPT ); Tue, 7 Jun 2016 06:29:04 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B650261386; Tue, 7 Jun 2016 10:29:02 +0000 (UTC) Received: from chewinlnx10.qualcomm.com (unknown [202.46.23.62]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: charanya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 29E84600D8; Tue, 7 Jun 2016 10:28:53 +0000 (UTC) From: Charanya Venkatraman To: agross@codeaurora.org, david.brown@linaro.org, andy.gross@linaro.org, gregkh@linuxfoundation.org Cc: jslaby@suse.com, linux-soc@vger.kernel.org, linux-serial@vger.kernel.org, sricharan@codeaurora.org, architt@codeaurora.org, linux-arm-msm@vger.kernel.org, ntelkar@codeaurora.org, galak@codeaurora.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, absahu@codeaurora.org, njaigane@codeaurora.org, Charanya Venkatraman Subject: [PATCH v3] tty:serial:msm:Do not restore Rx interrupts in DMA Date: Tue, 7 Jun 2016 15:58:41 +0530 Message-Id: <1465295321-10506-1-git-send-email-charanya@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462896580-11554-1> References: <1462896580-11554-1> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Avoid data corruption issues that result in CRC errors during file transfers over serial ports at higher baud rates. The current msm_serial driver masks the FIFO Rx interrupts in msm_start_rx_dma() since Rx FIFO interrupts are not required in DMA mode. However, msm_complete_rx_dma() re-enables the Rx FIFO interrupts which could cause RXSTALE event to be processed when a TXLEV interrupt occurs. The following is the sequence of events that could occur resulting in data corruption. msm_start_rx_dma -> msm_complete_rx_dma --> spin_unlock_irqrestore(&port->lock) --> msm_uart_irq()(For TXLEV interrupt) --> msm_handle_rx_dm() (Read from FIFO resulting in data corruption) The patch fixes the issue by not restoring the RXLEV and RXSTALE interrupts in msm_complete_rx_dma(). These interrupts are required only in FIFO mode. Signed-off-by: Charanya Venkatraman Reviewed-by: Stephen Boyd Acked-by: Andy Gross --- Changes in v2: - Make commit message more clearer. Changes in v3: - Fix typos in commit message. drivers/tty/serial/msm_serial.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c index b7d80bd..646aa3f 100644 --- a/drivers/tty/serial/msm_serial.c +++ b/drivers/tty/serial/msm_serial.c @@ -388,10 +388,6 @@ static void msm_complete_rx_dma(void *args) val &= ~dma->enable_bit; msm_write(port, val, UARTDM_DMEN); - /* Restore interrupts */ - msm_port->imr |= UART_IMR_RXLEV | UART_IMR_RXSTALE; - msm_write(port, msm_port->imr, UART_IMR); - if (msm_read(port, UART_SR) & UART_SR_OVERRUN) { port->icount.overrun++; tty_insert_flip_char(tport, 0, TTY_OVERRUN);