From patchwork Fri Jan 20 15:32:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Merello X-Patchwork-Id: 9528819 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C2CA7601AE for ; Fri, 20 Jan 2017 15:33:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACB9528484 for ; Fri, 20 Jan 2017 15:33:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A170E28527; Fri, 20 Jan 2017 15:33:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8997F28484 for ; Fri, 20 Jan 2017 15:33:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752419AbdATPdI (ORCPT ); Fri, 20 Jan 2017 10:33:08 -0500 Received: from mail-wj0-f195.google.com ([209.85.210.195]:34354 "EHLO mail-wj0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752670AbdATPdH (ORCPT ); Fri, 20 Jan 2017 10:33:07 -0500 Received: by mail-wj0-f195.google.com with SMTP id ip10so1125098wjb.1 for ; Fri, 20 Jan 2017 07:33:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=9HqTajlo/SfN5U6l5uSoW3zHncW4s841/jSAmAdcrX8=; b=kmFpnuejruonCFe91xIjiCgIHwX6T3+jmnQbGQxGgcvi4a4h5adMfOBmo8u1J3PbSj 2w5beQEt02FYJ7ysKB8ZKouvJxjZrpr/zbeSGKrhNyoNTk2zKSVyd6IPJ4/UtpjvJU2u 12MJkEtaSETsMcCMFt1S7lYKShp7oDxoM44sZZvHGFoSrpMibJhBxg5kc45KUvRnQdXF kC8gZIpA6gGKPSMmjRpIZHdk/unW00sNbRln0CrfghNXsl4RWoTpIcqHzfj+CvcbOJAX E69X/JXLZqcyAu58mxU4P7LEidREja1ds3k7a4Z/94bGM3L48gUPxRYF0I4JzPH45KPN XaSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=9HqTajlo/SfN5U6l5uSoW3zHncW4s841/jSAmAdcrX8=; b=hQ6eM1FCNZPRG515SQ+0JFa7Awgg2+DF9vnh05Z37iJFZWSebAxMfwNqh1cc3mt3x4 85JFd9EwVEeKwd7UCWvypCCI0xvjQtACxSPdS4zD02aAa/dRRVlL0UCSw9gQBb5k0lAY UwI+tVq9ICsQeE2y8bijvRc8GeatSDl/8yjysVmTsorfnPdMYbiKV329AJpzE2NVJ3eb zHqL/zpZ/RxmXycJu94kViHLv2k+pn3SU1Y+im16/pcLdvqyhb1cppRaupNTMAAt5aAM Ry1X+Md4gO1Jd0NiObZW2jaf3T4uqy3tSVguFwk0K1SgDModyJ1zuHcPLuvJ0ZUXh5qI cucA== X-Gm-Message-State: AIkVDXLS8RaCZNDpCUK4aFchOumPz5Cc9zFr/oTTMqNz6Z7Ja8Zy4tvSVJUJNr03NdjAaw== X-Received: by 10.223.163.81 with SMTP id d17mr12336412wrb.93.1484926380753; Fri, 20 Jan 2017 07:33:00 -0800 (PST) Received: from NewMoon.iit.local ([90.147.180.254]) by smtp.googlemail.com with ESMTPSA id l74sm6734899wmg.2.2017.01.20.07.32.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Jan 2017 07:32:59 -0800 (PST) From: Andrea Merello To: vinod.koul@intel.com, michal.simek@xilinx.com, soren.brinkmann@xilinx.com Cc: dmaengine@vger.kernel.org, Andrea Merello Subject: [PATCH 1/5] dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather Date: Fri, 20 Jan 2017 16:32:45 +0100 Message-Id: <1484926369-30910-1-git-send-email-andrea.merello@gmail.com> X-Mailer: git-send-email 2.7.4 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The HW can be either direct-access or scatter-gather version. These are SW incompatible. The driver can handle both version: a DT propriety was used to tell the driver whether to assume the HW is is scatter-gather mode. This patch makes the driver to autodetect this information. The DT propriety is not required anymore. Signed-off-by: Andrea Merello --- Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 3 --- drivers/dma/xilinx/xilinx_dma.c | 12 ++++++++---- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt index a2b8bfa..2897e6d 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt @@ -37,9 +37,6 @@ Required properties: Required properties for VDMA: - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w. -Optional properties: -- xlnx,include-sg: Tells configured for Scatter-mode in - the hardware. Optional properties for AXI DMA: - xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware. Optional properties for VDMA: diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index 8288fe4..b99094c 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -86,6 +86,7 @@ #define XILINX_DMA_DMASR_DMA_DEC_ERR BIT(6) #define XILINX_DMA_DMASR_DMA_SLAVE_ERR BIT(5) #define XILINX_DMA_DMASR_DMA_INT_ERR BIT(4) +#define XILINX_DMA_DMASR_SG_MASK BIT(3) #define XILINX_DMA_DMASR_IDLE BIT(1) #define XILINX_DMA_DMASR_HALTED BIT(0) #define XILINX_DMA_DMASR_DELAY_MASK GENMASK(31, 24) @@ -377,7 +378,6 @@ struct xilinx_dma_config { * @dev: Device Structure * @common: DMA device structure * @chan: Driver specific DMA channel - * @has_sg: Specifies whether Scatter-Gather is present or not * @mcdma: Specifies whether Multi-Channel is present or not * @flush_on_fsync: Flush on frame sync * @ext_addr: Indicates 64 bit addressing is supported by dma device @@ -396,7 +396,6 @@ struct xilinx_dma_device { struct device *dev; struct dma_device common; struct xilinx_dma_chan *chan[XILINX_DMA_MAX_CHANS_PER_DEVICE]; - bool has_sg; bool mcdma; u32 flush_on_fsync; bool ext_addr; @@ -2324,7 +2323,6 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, chan->dev = xdev->dev; chan->xdev = xdev; - chan->has_sg = xdev->has_sg; chan->desc_pendingcount = 0x0; chan->ext_addr = xdev->ext_addr; @@ -2404,6 +2402,13 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, else chan->start_transfer = xilinx_vdma_start_transfer; + /* check if SG is enabled */ + if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) & + XILINX_DMA_DMASR_SG_MASK) + chan->has_sg = true; + dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id, + chan->has_sg ? "enabled" : "disabled"); + /* Initialize the tasklet */ tasklet_init(&chan->tasklet, xilinx_dma_do_tasklet, (unsigned long)chan); @@ -2541,7 +2546,6 @@ static int xilinx_dma_probe(struct platform_device *pdev) return PTR_ERR(xdev->regs); /* Retrieve the DMA engine properties from the device tree */ - xdev->has_sg = of_property_read_bool(node, "xlnx,include-sg"); if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) xdev->mcdma = of_property_read_bool(node, "xlnx,mcdma");