From patchwork Fri Jan 20 15:32:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Merello X-Patchwork-Id: 9528825 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3241A601AE for ; Fri, 20 Jan 2017 15:33:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1FE792842F for ; Fri, 20 Jan 2017 15:33:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 14BF428527; Fri, 20 Jan 2017 15:33:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A85642842F for ; Fri, 20 Jan 2017 15:33:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752755AbdATPdM (ORCPT ); Fri, 20 Jan 2017 10:33:12 -0500 Received: from mail-wj0-f193.google.com ([209.85.210.193]:34358 "EHLO mail-wj0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752328AbdATPdI (ORCPT ); Fri, 20 Jan 2017 10:33:08 -0500 Received: by mail-wj0-f193.google.com with SMTP id ip10so1125126wjb.1 for ; Fri, 20 Jan 2017 07:33:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9Z0LxP62cJsi7QLo+El+Vp3R+ogplbz6USz6zESFX3g=; b=NSf6lkzBN2KqcloAatd7dBb3Mp/yj+c2D+AXzO4zOfGt/BoB1npXSuXr33s9GjCAOm oVToxe32A/yyFurrc2axxSXLsLAoHFBx0tqDGdxmt+CwwG6APpIBmlH8K7NCYqtHv+kr EaQtN64UD8X0Lld6y3zv5dhGlVCM2qMfN672TiVKJDAdPGq2Ixg8AWHtARxYof1jo4OU ruZfpUsYAosKSqG6G7ecVS3CiJkeCpAbV7dtdsV5CuKpWhqnArXOu5Sl8u1gOn6m0kx3 UvppbFOqi/Q8HZ2NDaYQNuuDtX3vqttp0My6ZAX5wu8foID178akr6uLwD0ZWcH8gVRY 1JKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9Z0LxP62cJsi7QLo+El+Vp3R+ogplbz6USz6zESFX3g=; b=jDKD0yjrfp//NStznKdk7I+k88RsBbANKw81nMu2kS2YTjF0lsmkkN9xbzYWd2EWyl An/4I9RBtKSKKNtaajbGRwhLVFdmaUO0uzNI9AQPdEvwQwpRTPTOlVFemaQKqoRwfeX+ 2CLU5tg21434BIZIC3iPBPkt+QHNusdSb54oosOyo1GFOA9snTK1gzFb21pKN0CIoWhJ rrOg473BhMi0KLHB+QQsd/kxGNupQFk+DSFha60q1Ns+LfaVbtBjEFthdgNXpnBXzea5 HyFD/jCFCdwQDNzC+ua1BIEWTvXaQsf7clMODLHz8xb24LK8VyAE2RIZ/AHHxA8cGA5G 2D6Q== X-Gm-Message-State: AIkVDXLb+uxcpokP8MbJ7baGQSuHOj5wI0loXPCfEKdgKta/DqswNItCcT2cxdEKNHimng== X-Received: by 10.223.128.202 with SMTP id 68mr7687812wrl.161.1484926382371; Fri, 20 Jan 2017 07:33:02 -0800 (PST) Received: from NewMoon.iit.local ([90.147.180.254]) by smtp.googlemail.com with ESMTPSA id l74sm6734899wmg.2.2017.01.20.07.33.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Jan 2017 07:33:01 -0800 (PST) From: Andrea Merello To: vinod.koul@intel.com, michal.simek@xilinx.com, soren.brinkmann@xilinx.com Cc: dmaengine@vger.kernel.org, Andrea Merello Subject: [PATCH 3/5] dmaengine: xilinx_dma: fix splitting transfer causes misalingments Date: Fri, 20 Jan 2017 16:32:47 +0100 Message-Id: <1484926369-30910-3-git-send-email-andrea.merello@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484926369-30910-1-git-send-email-andrea.merello@gmail.com> References: <1484926369-30910-1-git-send-email-andrea.merello@gmail.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Whenever a single or cyclic transaction is prepared, the driver could eventually split it over several SG descriptors in order to deal with the HW maximum transfer length. This could end up in DMA operations starting from a misaligned address. This patch adjust the trasfer size in order to make sure all operations start from an aligned address. Signed-off-by: Andrea Merello --- drivers/dma/xilinx/xilinx_dma.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index 4ae2c10..33c0949 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -363,6 +363,7 @@ struct xilinx_dma_chan { struct xilinx_axidma_tx_segment *cyclic_seg_v; void (*start_transfer)(struct xilinx_dma_chan *chan); u16 tdest; + u32 copy_mask; }; struct xilinx_dma_config { @@ -1759,10 +1760,14 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_slave_sg( /* * Calculate the maximum number of bytes to transfer, - * making sure it is less than the hw limit + * making sure it is less than the hw limit and that + * the next chuck start address is aligned */ - copy = min_t(size_t, sg_dma_len(sg) - sg_used, - XILINX_DMA_MAX_TRANS_LEN); + copy = sg_dma_len(sg) - sg_used; + if (copy > XILINX_DMA_MAX_TRANS_LEN) + copy = XILINX_DMA_MAX_TRANS_LEN & + chan->copy_mask; + hw = &segment->hw; /* Fill in the descriptor */ @@ -1866,10 +1871,14 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_dma_cyclic( /* * Calculate the maximum number of bytes to transfer, - * making sure it is less than the hw limit + * making sure it is less than the hw limit and that + * the next chuck start address is aligned */ - copy = min_t(size_t, period_len - sg_used, - XILINX_DMA_MAX_TRANS_LEN); + copy = period_len - sg_used; + if (copy > XILINX_DMA_MAX_TRANS_LEN) + copy = XILINX_DMA_MAX_TRANS_LEN & + chan->copy_mask; + hw = &segment->hw; xilinx_axidma_buf(chan, hw, buf_addr, sg_used, period_len * i); @@ -2353,8 +2362,12 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, if (width > 8) has_dre = false; - if (!has_dre) + if (has_dre) { + chan->copy_mask = ~0; + } else { xdev->common.copy_align = fls(width - 1); + chan->copy_mask = ~(width - 1); + } if (of_device_is_compatible(node, "xlnx,axi-vdma-mm2s-channel") || of_device_is_compatible(node, "xlnx,axi-dma-mm2s-channel") ||