From patchwork Mon Aug 7 16:39:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Jiang X-Patchwork-Id: 9885809 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 97F09603B4 for ; Mon, 7 Aug 2017 16:39:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 88DA628686 for ; Mon, 7 Aug 2017 16:39:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7DE6C2868B; Mon, 7 Aug 2017 16:39:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 27E9D28686 for ; Mon, 7 Aug 2017 16:39:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751820AbdHGQjc (ORCPT ); Mon, 7 Aug 2017 12:39:32 -0400 Received: from mga04.intel.com ([192.55.52.120]:15522 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751704AbdHGQjc (ORCPT ); Mon, 7 Aug 2017 12:39:32 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Aug 2017 09:39:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,339,1498546800"; d="scan'208";a="1000990061" Received: from djiang5-desk3.ch.intel.com ([143.182.137.38]) by orsmga003.jf.intel.com with ESMTP; 07 Aug 2017 09:39:31 -0700 Subject: [PATCH v4 3/8] dmaengine: Add DMA_MEMCPY_SG transaction op From: Dave Jiang To: vinod.koul@intel.com, dan.j.williams@intel.com Cc: dmaengine@vger.kernel.org, ross.zwisler@linux.intel.com, linux-nvdimm@lists.01.org Date: Mon, 07 Aug 2017 09:39:31 -0700 Message-ID: <150212397144.23722.92320326335988578.stgit@djiang5-desk3.ch.intel.com> In-Reply-To: <150212381454.23722.1549806704988615279.stgit@djiang5-desk3.ch.intel.com> References: <150212381454.23722.1549806704988615279.stgit@djiang5-desk3.ch.intel.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding a dmaengine transaction operation that allows copy to/from a scatterlist and a flat buffer. Signed-off-by: Dave Jiang --- Documentation/dmaengine/provider.txt | 3 +++ drivers/dma/dmaengine.c | 2 ++ include/linux/dmaengine.h | 6 ++++++ 3 files changed, 11 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/dmaengine/provider.txt b/Documentation/dmaengine/provider.txt index 8f189c9..03e8650 100644 --- a/Documentation/dmaengine/provider.txt +++ b/Documentation/dmaengine/provider.txt @@ -188,6 +188,9 @@ Currently, the types available are: scatter-gather transfer, with a single chunk to transfer, it's a distinct transaction type in the mem2mem transfers case + * DMA_MEMCPY_SG + - The device supports scatterlist to/from memory. + * DMA_PRIVATE - The devices only supports slave transfers, and as such isn't available for async transfers. diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index 2219b1f..1c424f6 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c @@ -939,6 +939,8 @@ int dma_async_device_register(struct dma_device *device) !device->device_prep_dma_interrupt); BUG_ON(dma_has_cap(DMA_SG_SG, device->cap_mask) && !device->device_prep_dma_sg); + BUG_ON(dma_has_cap(DMA_MEMCPY_SG, device->cap_mask) && + !device->device_prep_dma_memcpy_sg); BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic); BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index b1182c6..fc25475 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -67,6 +67,7 @@ enum dma_transaction_type { DMA_PQ_VAL, DMA_MEMSET, DMA_MEMSET_SG, + DMA_MEMCPY_SG, DMA_INTERRUPT, DMA_SG_SG, DMA_PRIVATE, @@ -693,6 +694,7 @@ struct dma_filter { * @device_prep_dma_pq_val: prepares a pqzero_sum operation * @device_prep_dma_memset: prepares a memset operation * @device_prep_dma_memset_sg: prepares a memset operation over a scatter list + * @device_prep_dma_memcpy_sg: prepares memcpy between scatterlist and buffer * @device_prep_dma_interrupt: prepares an end of chain interrupt operation * @device_prep_slave_sg: prepares a slave dma operation * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio. @@ -769,6 +771,10 @@ struct dma_device { struct dma_async_tx_descriptor *(*device_prep_dma_memset_sg)( struct dma_chan *chan, struct scatterlist *sg, unsigned int nents, int value, unsigned long flags); + struct dma_async_tx_descriptor *(*device_prep_dma_memcpy_sg)( + struct dma_chan *chan, + struct scatterlist *dst_sg, unsigned int dst_nents, + dma_addr_t src, bool to_sg, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( struct dma_chan *chan, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_sg)(