From patchwork Tue Sep 11 07:26:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Yves MORDRET X-Patchwork-Id: 10595169 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4BA5914E0 for ; Tue, 11 Sep 2018 07:27:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3299E2927E for ; Tue, 11 Sep 2018 07:27:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 266662928D; Tue, 11 Sep 2018 07:27:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C9BDB2927E for ; Tue, 11 Sep 2018 07:27:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727834AbeIKMZg (ORCPT ); Tue, 11 Sep 2018 08:25:36 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:10010 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727793AbeIKMZe (ORCPT ); Tue, 11 Sep 2018 08:25:34 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w8B7OI0m026390; Tue, 11 Sep 2018 09:27:06 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2me62r0yce-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 11 Sep 2018 09:27:06 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 228BF34; Tue, 11 Sep 2018 07:27:06 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C6AAB1E40; Tue, 11 Sep 2018 07:27:05 +0000 (GMT) Received: from localhost (10.75.127.47) by SFHDAG5NODE2.st.com (10.75.127.14) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 11 Sep 2018 09:27:05 +0200 From: Pierre-Yves MORDRET To: Vinod Koul , Rob Herring , Mark Rutland , Alexandre Torgue , Maxime Coquelin , Dan Williams , , , , CC: Pierre-Yves MORDRET Subject: [PATCH v1 2/7] dt-bindings: stm32-dmamux: Add one cell to support DMA/MDMA chain Date: Tue, 11 Sep 2018 09:26:55 +0200 Message-ID: <1536650820-16076-3-git-send-email-pierre-yves.mordret@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536650820-16076-1-git-send-email-pierre-yves.mordret@st.com> References: <1536650820-16076-1-git-send-email-pierre-yves.mordret@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG3NODE1.st.com (10.75.127.7) To SFHDAG5NODE2.st.com (10.75.127.14) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-09-11_03:,, signatures=0 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add one cell to support DMA/MDMA chaining. Signed-off-by: Pierre-Yves MORDRET --- Version history: v1: * Initial --- --- Documentation/devicetree/bindings/dma/stm32-dmamux.txt | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/stm32-dmamux.txt b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt index 1b893b2..8e092d2 100644 --- a/Documentation/devicetree/bindings/dma/stm32-dmamux.txt +++ b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt @@ -4,9 +4,6 @@ Required properties: - compatible: "st,stm32h7-dmamux" - reg: Memory map for accessing module - #dma-cells: Should be set to <3>. - First parameter is request line number. - Second is DMA channel configuration - Third is Fifo threshold For more details about the three cells, please see stm32-dma.txt documentation binding file - dma-masters: Phandle pointing to the DMA controllers. @@ -53,7 +50,7 @@ dma2: dma@40020400 { <68>, <69>, <70>; - clocks = <&timer_clk>; + clocks = <&clk_hclk>; #dma-cells = <4>; st,mem2mem; resets = <&rcc 150>;