diff mbox series

[v1,14/15] ARM: dts: imx6sll: correct ecspi/sdma compatible

Message ID 1556027045-5269-15-git-send-email-yibin.gong@nxp.com (mailing list archive)
State Not Applicable
Headers show
Series add ecspi ERR009165 for i.mx6/7 soc family | expand

Commit Message

Robin Gong April 23, 2019, 1:51 p.m. UTC
Correct ecspi/sdma compatible since ecspi errata ERR009165
not fixed on i.mx6sll chip.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 arch/arm/boot/dts/imx6sll.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Sascha Hauer April 24, 2019, 6:37 a.m. UTC | #1
On Tue, Apr 23, 2019 at 01:51:45PM +0000, Robin Gong wrote:
> Correct ecspi/sdma compatible since ecspi errata ERR009165
> not fixed on i.mx6sll chip.
> 
> Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> ---
>  arch/arm/boot/dts/imx6sll.dtsi | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
> index 1b4899f..03f2103 100644
> --- a/arch/arm/boot/dts/imx6sll.dtsi
> +++ b/arch/arm/boot/dts/imx6sll.dtsi
> @@ -183,7 +183,7 @@
>  				};
>  
>  				ecspi1: spi@2008000 {
> -					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
> +					compatible ="fsl,imx51-ecspi";

Where is the fsl,imx6sll-ecspi compatible that would have prevented us
from changing this devicetree now? You should at least add it now.

Sascha
Robin Gong April 24, 2019, 9:06 a.m. UTC | #2
On 2019-04-24 at 08:37 +0200, s.hauer@pengutronix.de wrote:
> On Tue, Apr 23, 2019 at 01:51:45PM +0000, Robin Gong wrote:
> > 
> > Correct ecspi/sdma compatible since ecspi errata ERR009165
> > not fixed on i.mx6sll chip.
> > 
> > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > ---
> >  arch/arm/boot/dts/imx6sll.dtsi | 10 +++++-----
> >  1 file changed, 5 insertions(+), 5 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/imx6sll.dtsi
> > b/arch/arm/boot/dts/imx6sll.dtsi
> > index 1b4899f..03f2103 100644
> > --- a/arch/arm/boot/dts/imx6sll.dtsi
> > +++ b/arch/arm/boot/dts/imx6sll.dtsi
> > @@ -183,7 +183,7 @@
> >                               };
> > 
> >                               ecspi1: spi@2008000 {
> > -                                     compatible = "fsl,imx6ul-
> > ecspi", "fsl,imx51-ecspi";
> > +                                     compatible ="fsl,imx51-
> > ecspi";
> Where is the fsl,imx6sll-ecspi compatible that would have prevented
> us
> from changing this devicetree now? You should at least add it now.
Will add fsl,imx6sll-ecspi in V2.
> 
> Sascha
> 
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diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index 1b4899f..03f2103 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -183,7 +183,7 @@ 
 				};
 
 				ecspi1: spi@2008000 {
-					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
+					compatible ="fsl,imx51-ecspi";
 					reg = <0x02008000 0x4000>;
 					interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 					dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
@@ -195,7 +195,7 @@ 
 				};
 
 				ecspi2: spi@200c000 {
-					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
+					compatible = "fsl,imx51-ecspi";
 					reg = <0x0200c000 0x4000>;
 					interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 					dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
@@ -207,7 +207,7 @@ 
 				};
 
 				ecspi3: spi@2010000 {
-					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
+					compatible = "fsl,imx51-ecspi";
 					reg = <0x02010000 0x4000>;
 					interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 					dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
@@ -219,7 +219,7 @@ 
 				};
 
 				ecspi4: spi@2014000 {
-					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
+					compatible = "fsl,imx51-ecspi";
 					reg = <0x02014000 0x4000>;
 					interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 					dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
@@ -619,7 +619,7 @@ 
 			};
 
 			sdma: dma-controller@20ec000 {
-				compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma";
+				compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
 				reg = <0x020ec000 0x4000>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6SLL_CLK_IPG>,