| Message ID | 1591234598-78919-1-git-send-email-sugar.zhang@rock-chips.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [v1] dmaengine: pl330: Make sure the debug is idle before doing DMAGO | expand |
On 04-06-20, 09:36, Sugar Zhang wrote: > According to the datasheet of pl330: > > Example 2-1 Using DMAGO with the debug instruction registers > > 1. Create a program for the DMA channel > 2. Store the program in a region of system memory > 3. Poll the DBGSTATUS Register to ensure that the debug is idle > 4. Write to the DBGINST0 Register > 5. Write to the DBGINST1 Register > 6. Write zero to the DBGCMD Register > > so, we should make sure the debug is idle before step 4/5/6, not > only step 6. if not, there maybe a risk that fail to write DBGINST0/1. Applied, thanks > > Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> > --- > > drivers/dma/pl330.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c > index 88b884c..6a158ee 100644 > --- a/drivers/dma/pl330.c > +++ b/drivers/dma/pl330.c > @@ -885,6 +885,12 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, > void __iomem *regs = thrd->dmac->base; > u32 val; > > + /* If timed out due to halted state-machine */ > + if (_until_dmac_idle(thrd)) { > + dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); > + return; > + } > + > val = (insn[0] << 16) | (insn[1] << 24); > if (!as_manager) { > val |= (1 << 0); > @@ -895,12 +901,6 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, > val = le32_to_cpu(*((__le32 *)&insn[2])); > writel(val, regs + DBGINST1); > > - /* If timed out due to halted state-machine */ > - if (_until_dmac_idle(thrd)) { > - dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); > - return; > - } > - > /* Get going */ > writel(0, regs + DBGCMD); > } > -- > 2.7.4 > >
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 88b884c..6a158ee 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -885,6 +885,12 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, void __iomem *regs = thrd->dmac->base; u32 val; + /* If timed out due to halted state-machine */ + if (_until_dmac_idle(thrd)) { + dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); + return; + } + val = (insn[0] << 16) | (insn[1] << 24); if (!as_manager) { val |= (1 << 0); @@ -895,12 +901,6 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd, val = le32_to_cpu(*((__le32 *)&insn[2])); writel(val, regs + DBGINST1); - /* If timed out due to halted state-machine */ - if (_until_dmac_idle(thrd)) { - dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n"); - return; - } - /* Get going */ writel(0, regs + DBGCMD); }
According to the datasheet of pl330: Example 2-1 Using DMAGO with the debug instruction registers 1. Create a program for the DMA channel 2. Store the program in a region of system memory 3. Poll the DBGSTATUS Register to ensure that the debug is idle 4. Write to the DBGINST0 Register 5. Write to the DBGINST1 Register 6. Write zero to the DBGCMD Register so, we should make sure the debug is idle before step 4/5/6, not only step 6. if not, there maybe a risk that fail to write DBGINST0/1. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> --- drivers/dma/pl330.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)