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Thu, 2 Jul 2020 06:53:51 +0000 From: Robin Gong To: vkoul@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, catalin.marinas@arm.com, will@kernel.org, dan.j.williams@intel.com, angelo@sysam.it Cc: kernel@pengutronix.de, linux-imx@nxp.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 3/9] dmaengine: fsl-edma-common: add fsl_chan into fsl_edma_fill_tcd Date: Thu, 2 Jul 2020 23:08:03 +0800 Message-Id: <1593702489-21648-4-git-send-email-yibin.gong@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593702489-21648-1-git-send-email-yibin.gong@nxp.com> References: <1593702489-21648-1-git-send-email-yibin.gong@nxp.com> X-ClientProxiedBy: SG2PR01CA0172.apcprd01.prod.exchangelabs.com (2603:1096:4:28::28) To VE1PR04MB6638.eurprd04.prod.outlook.com (2603:10a6:803:119::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from robin-OptiPlex-790.ap.freescale.net (119.31.174.67) by SG2PR01CA0172.apcprd01.prod.exchangelabs.com (2603:1096:4:28::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3153.24 via Frontend Transport; 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Signed-off-by: Robin Gong --- drivers/dma/fsl-edma-common.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index d19e8a8..6ef083c 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -376,7 +376,8 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, } static inline -void fsl_edma_fill_tcd(struct fsl_edma_hw_tcd *tcd, u32 src, u32 dst, +void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan, + struct fsl_edma_hw_tcd *tcd, u32 src, u32 dst, u16 attr, u16 soff, u32 nbytes, u32 slast, u16 citer, u16 biter, u16 doff, u32 dlast_sga, bool major_int, bool disable_req, bool enable_sg) @@ -504,9 +505,9 @@ struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic( doff = fsl_chan->cfg.src_addr_width; } - fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr, dst_addr, - fsl_chan->attr, soff, nbytes, 0, iter, - iter, doff, last_sg, true, false, true); + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr, + dst_addr, fsl_chan->attr, soff, nbytes, 0, + iter, iter, doff, last_sg, true, false, true); dma_buf_next += period_len; } @@ -569,16 +570,16 @@ struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg( iter = sg_dma_len(sg) / nbytes; if (i < sg_len - 1) { last_sg = fsl_desc->tcd[(i + 1)].ptcd; - fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr, - dst_addr, fsl_chan->attr, soff, - nbytes, 0, iter, iter, doff, last_sg, - false, false, true); + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, + src_addr, dst_addr, fsl_chan->attr, + soff, nbytes, 0, iter, iter, doff, + last_sg, false, false, true); } else { last_sg = 0; - fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr, - dst_addr, fsl_chan->attr, soff, - nbytes, 0, iter, iter, doff, last_sg, - true, true, false); + fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, + src_addr, dst_addr, fsl_chan->attr, + soff, nbytes, 0, iter, iter, doff, + last_sg, true, true, false); } }