From patchwork Sun Sep 3 22:40:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Br=C3=BCns?= X-Patchwork-Id: 9936617 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A6599601EB for ; Sun, 3 Sep 2017 22:42:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96982285E8 for ; Sun, 3 Sep 2017 22:42:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8B5FC286AD; Sun, 3 Sep 2017 22:42:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3A9AC285E8 for ; Sun, 3 Sep 2017 22:42:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753193AbdICWmG (ORCPT ); Sun, 3 Sep 2017 18:42:06 -0400 Received: from mail-out-2.itc.rwth-aachen.de ([134.130.5.47]:16103 "EHLO mail-out-2.itc.rwth-aachen.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753335AbdICWlO (ORCPT ); Sun, 3 Sep 2017 18:41:14 -0400 X-IronPort-AV: E=Sophos;i="5.41,472,1498514400"; d="scan'208";a="11607793" Received: from rwthex-w2-b.rwth-ad.de ([134.130.26.159]) by mail-in-2.itc.rwth-aachen.de with ESMTP; 04 Sep 2017 00:41:12 +0200 Received: from pebbles.fritz.box (92.225.242.208) by rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Mon, 4 Sep 2017 00:41:11 +0200 From: =?UTF-8?q?Stefan=20Br=C3=BCns?= To: CC: , , Vinod Koul , , , Maxime Ripard , Chen-Yu Tsai , Rob Herring , Code Kipper , Andre Przywara Subject: [PATCH 06/10] arm64: allwinner: a64: Add devicetree binding for DMA controller Date: Mon, 4 Sep 2017 00:40:57 +0200 Message-ID: <20170903224100.17893-7-stefan.bruens@rwth-aachen.de> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170903224100.17893-1-stefan.bruens@rwth-aachen.de> References: <20170903224100.17893-1-stefan.bruens@rwth-aachen.de> MIME-Version: 1.0 X-Originating-IP: [92.225.242.208] X-ClientProxiedBy: rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The A64 is register compatible with the H3, but has a different number of dma channels and request ports. Attach additional properties to the node to allow future reuse of the compatible for controllers with different number of channels/requests. If dma-requests is not specified, the register layout defined maximum of 32 is used. Signed-off-by: Stefan Brüns --- .../devicetree/bindings/dma/sun6i-dma.txt | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt index 6b267045f522..66195fb31296 100644 --- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt +++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt @@ -26,6 +26,32 @@ Example: #dma-cells = <1>; }; +------------------------------------------------------------------------------ +For A64 DMA controller: + +Required properties: +- compatible: "allwinner,sun50i-a64-dma" +- dma-channels: Number of DMA channels supported by the controller. + Refer to Documentation/devicetree/bindings/dma/dma.txt +- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells + +Optional properties: +- dma-requests: Number of DMA request signals supported by the controller. + Refer to Documentation/devicetree/bindings/dma/dma.txt + +Example: + dma: dma-controller@01c02000 { + compatible = "allwinner,sun50i-a64-dma"; + reg = <0x01c02000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_DMA>; + dma-channels = <8>; + dma-requests = <27>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; +------------------------------------------------------------------------------ + Clients: DMA clients connected to the A31 DMA controller must use the format