From patchwork Sun Sep 3 22:40:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Br=C3=BCns?= X-Patchwork-Id: 9936599 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A575A601EB for ; Sun, 3 Sep 2017 22:41:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96ACF285E8 for ; Sun, 3 Sep 2017 22:41:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8B120286AD; Sun, 3 Sep 2017 22:41:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C0E2285E8 for ; Sun, 3 Sep 2017 22:41:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753330AbdICWlS (ORCPT ); Sun, 3 Sep 2017 18:41:18 -0400 Received: from mail-out-2.itc.rwth-aachen.de ([134.130.5.47]:6268 "EHLO mail-out-2.itc.rwth-aachen.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753347AbdICWlO (ORCPT ); Sun, 3 Sep 2017 18:41:14 -0400 X-IronPort-AV: E=Sophos;i="5.41,472,1498514400"; d="scan'208";a="11607794" Received: from rwthex-w2-b.rwth-ad.de ([134.130.26.159]) by mail-in-2.itc.rwth-aachen.de with ESMTP; 04 Sep 2017 00:41:13 +0200 Received: from pebbles.fritz.box (92.225.242.208) by rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Mon, 4 Sep 2017 00:41:12 +0200 From: =?UTF-8?q?Stefan=20Br=C3=BCns?= To: CC: , , Vinod Koul , , , Maxime Ripard , Chen-Yu Tsai , Rob Herring , Code Kipper , Andre Przywara Subject: [PATCH 07/10] dmaengine: sun6i: Retrieve channel count/max request from devicetree Date: Mon, 4 Sep 2017 00:40:58 +0200 Message-ID: <20170903224100.17893-8-stefan.bruens@rwth-aachen.de> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170903224100.17893-1-stefan.bruens@rwth-aachen.de> References: <20170903224100.17893-1-stefan.bruens@rwth-aachen.de> MIME-Version: 1.0 X-Originating-IP: [92.225.242.208] X-ClientProxiedBy: rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To avoid introduction of a new compatible for each small SoC/DMA controller variation, move the definition of the channel count to the devicetree. The number of vchans is no longer explicit, but limited by the highest port/DMA request number. The result is a slight overallocation for SoCs with a sparse port mapping. Signed-off-by: Stefan Brüns --- drivers/dma/sun6i-dma.c | 35 ++++++++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index c69dadb853d2..bd4c2e4a759b 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -42,6 +42,9 @@ #define DMA_STAT 0x30 +/* Offset between DMA_IRQ_EN and DMA_IRQ_STAT limits number of channels */ +#define DMA_MAX_CHANNELS (DMA_IRQ_CHAN_NR * 0x10 / 4) + /* * sun8i specific registers */ @@ -65,7 +68,8 @@ #define DMA_CHAN_LLI_ADDR 0x08 #define DMA_CHAN_CUR_CFG 0x0c -#define DMA_CHAN_CFG_SRC_DRQ(x) ((x) & 0x1f) +#define DMA_CHAN_MAX_DRQ 0x1f +#define DMA_CHAN_CFG_SRC_DRQ(x) ((x) & DMA_CHAN_MAX_DRQ) #define DMA_CHAN_CFG_SRC_IO_MODE BIT(5) #define DMA_CHAN_CFG_SRC_LINEAR_MODE (0 << 5) #define DMA_CHAN_CFG_SRC_BURST_A31(x) (((x) & 0x3) << 7) @@ -1173,6 +1177,35 @@ static int sun6i_dma_probe(struct platform_device *pdev) sdc->num_vchans = sdc->cfg->nr_max_vchans; sdc->max_request = sdc->cfg->nr_max_requests; + ret = of_property_read_u32(np, "dma-channels", &sdc->num_pchans); + if (ret && !sdc->num_pchans) { + dev_err(&pdev->dev, "Can't get dma-channels.\n"); + return ret; + } + + if (sdc->num_pchans > DMA_MAX_CHANNELS) { + dev_err(&pdev->dev, "Number of dma-channels out of range.\n"); + return -EINVAL; + } + + ret = of_property_read_u32(np, "dma-requests", &sdc->max_request); + if (ret && !sdc->max_request) { + dev_info(&pdev->dev, "Missing dma-requests, using %u.\n", + DMA_CHAN_MAX_DRQ); + } + + if (sdc->max_request > DMA_CHAN_MAX_DRQ) { + dev_err(&pdev->dev, "Value of dma-requests out of range.\n"); + return -EINVAL; + } + + /* + * If the number of vchans is not specified, derive it from the + * highest port number, at most one channel per port and direction. + */ + if (!sdc->num_vchans) + sdc->num_vchans = 2 * (sdc->max_request + 1); + sdc->pchans = devm_kcalloc(&pdev->dev, sdc->num_pchans, sizeof(struct sun6i_pchan), GFP_KERNEL); if (!sdc->pchans)