From patchwork Tue Sep 12 10:44:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 9948967 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6DFD660325 for ; Tue, 12 Sep 2017 10:45:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6508428F14 for ; Tue, 12 Sep 2017 10:45:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 598E128F17; Tue, 12 Sep 2017 10:45:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD7AC28F13 for ; Tue, 12 Sep 2017 10:45:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751419AbdILKpE (ORCPT ); Tue, 12 Sep 2017 06:45:04 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:52438 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751451AbdILKpC (ORCPT ); Tue, 12 Sep 2017 06:45:02 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8CAiYhR016602; Tue, 12 Sep 2017 05:44:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1505213074; bh=e1qO2uS0sbFXRdqboLwk6OSJ4UvLUwxAA6JQwLv5dDc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ieo5D2BPIH12j04DIAsccZb2xofVjNzi5ky59vxMrckcYwALVAoxlF+6nGty6oLqR ibAfaIqwAZycqmF5c7arGp2phH8F0+mxtt/1qP/6s3VlJ/hl1EgKql06HGBd1VP2e7 FKfIsrCccDURemFpxQtIQtGTz7AajlCg2gaG2hYI= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8CAiYFK032350; Tue, 12 Sep 2017 05:44:34 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Tue, 12 Sep 2017 05:44:33 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Tue, 12 Sep 2017 05:44:33 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8CAiOu4007788; Tue, 12 Sep 2017 05:44:31 -0500 From: Peter Ujfalusi To: , CC: , , , , Subject: [PATCH 3/5] dmaengine: Support for querying maximum trasnfer length (of an SG element) Date: Tue, 12 Sep 2017 13:44:22 +0300 Message-ID: <20170912104424.18495-4-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170912104424.18495-1-peter.ujfalusi@ti.com> References: <20170912104424.18495-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Certain DMA engines have limitation on the maximum size of a transfer they can support. This size limitation is per SG element or for period length in cyclic transfers. In TI's eDMA and sDMA this limitation is not really a length limit, but it is the number of bursts that we can support in one transfer. With this callback the DMA drivers can provide hints to clients on how they should set up their buffers (sglist, cyclic buffer). Without this the clients must have open coded workarounds in place for each and every DMA engine they might be interfacing with to have correct length for the transfers. Signed-off-by: Peter Ujfalusi --- include/linux/dmaengine.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 8319101170fc..739824b94c1b 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -705,6 +705,9 @@ struct dma_filter { * @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address * @device_config: Pushes a new configuration to a channel, return 0 or an error * code + * @device_get_max_len: Get the maximum supported length in bytes of a slave + * transfer based on the set dma_slave_config. The length limitation + * applies to each SG element's length. * @device_pause: Pauses any transfer happening on a channel. Returns * 0 or an error code * @device_resume: Resumes any transfer on a channel previously @@ -792,6 +795,8 @@ struct dma_device { int (*device_config)(struct dma_chan *chan, struct dma_slave_config *config); + u32 (*device_get_max_len)(struct dma_chan *chan, + enum dma_transfer_direction dir); int (*device_pause)(struct dma_chan *chan); int (*device_resume)(struct dma_chan *chan); int (*device_terminate_all)(struct dma_chan *chan); @@ -812,6 +817,15 @@ static inline int dmaengine_slave_config(struct dma_chan *chan, return -ENOSYS; } +static inline u32 dmaengine_slave_get_max_len(struct dma_chan *chan, + enum dma_transfer_direction dir) +{ + if (chan->device->device_get_max_len) + return chan->device->device_get_max_len(chan, dir); + + return 0; +} + static inline bool is_slave_direction(enum dma_transfer_direction direction) { return (direction == DMA_MEM_TO_DEV) || (direction == DMA_DEV_TO_MEM);