From patchwork Tue Sep 12 10:44:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 9948989 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9F0B760360 for ; Tue, 12 Sep 2017 10:46:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 97BF728F12 for ; Tue, 12 Sep 2017 10:46:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8C94228F13; Tue, 12 Sep 2017 10:46:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0BBE528F11 for ; Tue, 12 Sep 2017 10:46:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751424AbdILKpd (ORCPT ); Tue, 12 Sep 2017 06:45:33 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:26760 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751370AbdILKpC (ORCPT ); Tue, 12 Sep 2017 06:45:02 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8CAiaGv018302; Tue, 12 Sep 2017 05:44:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1505213076; bh=d33L8/srOSJ5JMoAdteSs1oR1/iBm8YLFGRnXsFqoEc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hjOA7QXm6NxZn3IYbUVZoQOYyqWoPiar5UiszllMTX7zDKCwSainyrE8Vey7BoYeZ /0dFtHxD9lk3eV4n6vFDEOwiwNq10S59UTB6mOsLoCo4wosLemMlC4dbwSd+3PsSBk OhZbH4glImyXvqP6zSCiB3VXx0QFJNtEqTHwwHKo= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8CAiaOT032364; Tue, 12 Sep 2017 05:44:36 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Tue, 12 Sep 2017 05:44:35 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Tue, 12 Sep 2017 05:44:35 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8CAiOu5007788; Tue, 12 Sep 2017 05:44:34 -0500 From: Peter Ujfalusi To: , CC: , , , , Subject: [PATCH 4/5] dmaengine: edma: Implement device_get_max_len callback Date: Tue, 12 Sep 2017 13:44:23 +0300 Message-ID: <20170912104424.18495-5-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170912104424.18495-1-peter.ujfalusi@ti.com> References: <20170912104424.18495-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP eDMA can support maximum of 65535 number of bursts in one transfer. The limitation is because the CCNT counter is 16bit unsigned. Signed-off-by: Peter Ujfalusi --- drivers/dma/edma.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index 6970355abdc9..14c52574262c 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -900,6 +900,28 @@ static int edma_slave_config(struct dma_chan *chan, return 0; } +static u32 edma_get_max_len(struct dma_chan *chan, + enum dma_transfer_direction dir) +{ + struct edma_chan *echan = to_edma_chan(chan); + enum dma_slave_buswidth dev_width; + u32 burst; + + if (!is_slave_direction(dir)) + return 0; + + if (dir == DMA_DEV_TO_MEM) { + dev_width = echan->cfg.src_addr_width; + burst = echan->cfg.src_maxburst; + } else { + burst = echan->cfg.dst_maxburst; + dev_width = echan->cfg.dst_addr_width; + } + + /* CCNT: 16bit unsigned. Number of bursts */ + return dev_width * burst * (SZ_64K - 1); +} + static int edma_dma_pause(struct dma_chan *chan) { struct edma_chan *echan = to_edma_chan(chan); @@ -1850,6 +1872,7 @@ static void edma_dma_init(struct edma_cc *ecc, bool legacy_mode) s_ddev->device_issue_pending = edma_issue_pending; s_ddev->device_tx_status = edma_tx_status; s_ddev->device_config = edma_slave_config; + s_ddev->device_get_max_len = edma_get_max_len; s_ddev->device_pause = edma_dma_pause; s_ddev->device_resume = edma_dma_resume; s_ddev->device_terminate_all = edma_terminate_all;