From patchwork Wed Nov 8 10:02:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 10048199 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B9A3C6032D for ; Wed, 8 Nov 2017 10:04:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9D38D286F9 for ; Wed, 8 Nov 2017 10:04:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9023C28842; Wed, 8 Nov 2017 10:04:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8C46E286F9 for ; Wed, 8 Nov 2017 10:04:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751674AbdKHKB6 (ORCPT ); Wed, 8 Nov 2017 05:01:58 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:37897 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751350AbdKHKBz (ORCPT ); Wed, 8 Nov 2017 05:01:55 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id vA8A1rkJ000842; Wed, 8 Nov 2017 04:01:53 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1510135313; bh=WNspjtAmFZGg4IlbvNYeh791ml7zWBHsF/theQgDWaQ=; h=From:To:CC:Subject:Date; b=lL8UUfu7U460qTELxniaNZgVb1v2S5Vei6AhUXQAsBI2oxtn7FH7PhZdhLiRlZCE+ HUV8IXnEY4O1DbckQqhuC78bHgANBj8S0WBl4EN43mGXuMv+/wgmrSrj96yIvv8pOm 5p2hQNbFYekpV8aPP9G31+Vj7vdWiVCBN0qiTiQg= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vA8A1r6R024435; Wed, 8 Nov 2017 04:01:53 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Wed, 8 Nov 2017 04:01:52 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Wed, 8 Nov 2017 04:01:52 -0600 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vA8A1orn015450; Wed, 8 Nov 2017 04:01:51 -0600 From: Peter Ujfalusi To: , CC: , , Subject: [PATCH RESEND] dmaengine: ti-dma-crossbar: Correct am335x/am43xx mux value type Date: Wed, 8 Nov 2017 12:02:25 +0200 Message-ID: <20171108100225.25024-1-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The used 0x1f mask is only valid for am335x family of SoC, different family using this type of crossbar might have different number of electable events. In case of am43xx family 0x3f mask should have been used for example. Instead of trying to handle each family's mask, just use u8 type to store the mux value since the event offsets are aligned to byte offset. Fixes: 42dbdcc6bf965 ("dmaengine: ti-dma-crossbar: Add support for crossbar on AM33xx/AM43xx") Signed-off-by: Peter Ujfalusi --- Vinod, this patch somehow got missed, I have sent it in May: https://patchwork.kernel.org/patch/9736747/ Regards, Peter drivers/dma/ti-dma-crossbar.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/dma/ti-dma-crossbar.c b/drivers/dma/ti-dma-crossbar.c index f1d04b70ee67..7df910e7c348 100644 --- a/drivers/dma/ti-dma-crossbar.c +++ b/drivers/dma/ti-dma-crossbar.c @@ -49,12 +49,12 @@ struct ti_am335x_xbar_data { struct ti_am335x_xbar_map { u16 dma_line; - u16 mux_val; + u8 mux_val; }; -static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u16 val) +static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u8 val) { - writeb_relaxed(val & 0x1f, iomem + event); + writeb_relaxed(val, iomem + event); } static void ti_am335x_xbar_free(struct device *dev, void *route_data) @@ -105,7 +105,7 @@ static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec, } map->dma_line = (u16)dma_spec->args[0]; - map->mux_val = (u16)dma_spec->args[2]; + map->mux_val = (u8)dma_spec->args[2]; dma_spec->args[2] = 0; dma_spec->args_count = 2;