From patchwork Mon Jun 25 09:27:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrea Merello X-Patchwork-Id: 10485335 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9A6DA60230 for ; Mon, 25 Jun 2018 09:27:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8DA73288FA for ; Mon, 25 Jun 2018 09:27:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8070D28930; Mon, 25 Jun 2018 09:27:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 22B6B288FA for ; Mon, 25 Jun 2018 09:27:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752576AbeFYJ1u (ORCPT ); Mon, 25 Jun 2018 05:27:50 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:44912 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750919AbeFYJ1t (ORCPT ); Mon, 25 Jun 2018 05:27:49 -0400 Received: by mail-wr0-f193.google.com with SMTP id p12-v6so11265010wrn.11; Mon, 25 Jun 2018 02:27:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=67rhiyFVzoKVQXTuifEiGRJEsSDBWmuXfM2BvfFlAMY=; b=dhl6y9+v+ycSfiUBxdNf416LexO1FtagKLWSYz/FgwWxbTaD3JRk0mDpOP0heFjpm9 +b3bnFN4pscTJYmixfYnM2e+Jm7m5C1mwGxrV620QGuUiJVlhVkEECRWwfSfh0km33A7 yYorPABnKZZ3RG8C2P2sfOVQyylVwsky0nz2x5UPDmz/+dhU9lQCW+uTxF6gZIi9iLvN wsWI6S0KuUy9q3I7mq9oAteeeaskSNnI6OmqnV84cofVzs95Dy5i1nFah6B5x6xGylkp yxzC3HfzEdcR3SkuBlzXykESDM9uTfQmt55hO4qtvUrFoctqMt6qGG6dqnU++8L0MIE5 Oq2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=67rhiyFVzoKVQXTuifEiGRJEsSDBWmuXfM2BvfFlAMY=; b=g2ZJyTsH7a1u6ux04buofvyA1t2FRh/OwRno/N8OQNx1xKcGD+udH09VMRmKZNFyGK bqYr2leI7Dd/5Ji7KDXOAbUS4y0HclDBvfNo30i/T9Y7Xyne6+bMPsnWvjXNEYUuPklY UJPGRIfshg4DFY1qDaHB8AIYjqO/eCRl2tEr5Zihb7zpaqhKwl2E6YpGxYpOHvQIojtz fX4laN7ahMwRagqohX9URxOt+LKEX+mYTbrmTclTfYL2D27+8NmpdIl5ut3zGQMUrRjB 9YBw1jiq1sSXZTg8DqjZQwWlOE7VjQSTsyazlTlwsw/JfkfybAyfieWJ2O4ccMlnWCTJ lw6Q== X-Gm-Message-State: APt69E0f7VfSsjZej4yNOd9hflNvUPZb32wQ0QZTD01PaCLjFBdb72Nv Uwy6o3dxLRaGIObzHR5yMqM= X-Google-Smtp-Source: AAOMgpdS2STkIDUxrW88Z8MYmB+jI6DvmWOcw6WEScoskZ8ThR3W3RDBrvf3IyLpD7fCswnQzMn3+w== X-Received: by 2002:a5d:41c5:: with SMTP id e5-v6mr3256028wrq.25.1529918868222; Mon, 25 Jun 2018 02:27:48 -0700 (PDT) Received: from NewMoon.iit.local ([90.147.180.254]) by smtp.gmail.com with ESMTPSA id v2-v6sm15638779wrm.84.2018.06.25.02.27.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 Jun 2018 02:27:47 -0700 (PDT) From: Andrea Merello To: vkoul@kernel.org, dan.j.williams@intel.com, michal.simek@xilinx.com, appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrea Merello , Radhey Shyam Pandey Subject: [PATCH v3 1/5] dmaengine: xilinx_dma: in axidma slave_sg and dma_cylic mode align split descriptors Date: Mon, 25 Jun 2018 11:27:20 +0200 Message-Id: <20180625092724.22164-1-andrea.merello@gmail.com> X-Mailer: git-send-email 2.17.1 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Whenever a single or cyclic transaction is prepared, the driver could eventually split it over several SG descriptors in order to deal with the HW maximum transfer length. This could end up in DMA operations starting from a misaligned address. This seems fatal for the HW if DRE is not enabled. This patch eventually adjusts the transfer size in order to make sure all operations start from an aligned address. Cc: Radhey Shyam Pandey Signed-off-by: Andrea Merello Reviewed-by: Radhey Shyam Pandey --- Changes in v2: - don't introduce copy_mask field, rather rely on already-esistent copy_align field. Suggested by Radhey Shyam Pandey - reword title Changes in v3: - fix bug introduced in v2: wrong copy size when DRE is enabled use implementation suggested by Radhey Shyam Pandey --- drivers/dma/xilinx/xilinx_dma.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index 27b523530c4a..113d9bf1b6a1 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -1793,6 +1793,16 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_slave_sg( */ copy = min_t(size_t, sg_dma_len(sg) - sg_used, XILINX_DMA_MAX_TRANS_LEN); + + if ((copy + sg_used < sg_dma_len(sg)) && + chan->xdev->common.copy_align) { + /* + * If this is not the last descriptor, make sure + * the next one will be properly aligned + */ + copy = rounddown(copy, + (1 << chan->xdev->common.copy_align)); + } hw = &segment->hw; /* Fill in the descriptor */ @@ -1898,6 +1908,16 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_dma_cyclic( */ copy = min_t(size_t, period_len - sg_used, XILINX_DMA_MAX_TRANS_LEN); + + if ((copy + sg_used < period_len) && + chan->xdev->common.copy_align) { + /* + * If this is not the last descriptor, make sure + * the next one will be properly aligned + */ + copy = rounddown(copy, + (1 << chan->xdev->common.copy_align)); + } hw = &segment->hw; xilinx_axidma_buf(chan, hw, buf_addr, sg_used, period_len * i);