Message ID | 20181017055957.542-2-peng.ma@nxp.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | [v9,1/7] dmaengine: fsldma: Replace DMA_IN/OUT by FSL_DMA_IN/OUT | expand |
Hi Peng, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on linux-sof-driver/master] [also build test WARNING on v4.19 next-20181019] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Peng-Ma/dmaengine-fsldma-Replace-DMA_IN-OUT-by-FSL_DMA_IN-OUT/20181017-232444 base: https://github.com/thesofproject/linux master config: powerpc-xes_mpc85xx_defconfig (attached as .config) compiler: powerpc-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.2.0 make.cross ARCH=powerpc All warnings (new ones prefixed by >>): In file included from drivers/dma/fsldma.c:41:0: drivers/dma/fsldma.h: In function 'fsl_ioread64': >> drivers/dma/fsldma.h:210:17: warning: passing argument 1 of 'in_le32' makes pointer from integer without a cast [-Wint-conversion] return in_le32(fsl_addr) | in_le32(fsl_addr + 1) << 32; ^~~~~~~~ In file included from include/linux/io.h:25:0, from include/linux/irq.h:20, from arch/powerpc/include/asm/hardirq.h:6, from include/linux/hardirq.h:9, from include/linux/interrupt.h:11, from include/linux/pci.h:32, from drivers/dma/fsldma.c:29: arch/powerpc/include/asm/io.h:172:15: note: expected 'const volatile u32 * {aka const volatile unsigned int *}' but argument is of type 'u32 {aka unsigned int}' DEF_MMIO_IN_X(in_le32, 32, lwbrx); ^ arch/powerpc/include/asm/io.h:131:23: note: in definition of macro 'DEF_MMIO_IN_X' static inline u##size name(const volatile u##size __iomem *addr) \ ^~~~ In file included from drivers/dma/fsldma.c:41:0: drivers/dma/fsldma.h:210:37: warning: passing argument 1 of 'in_le32' makes pointer from integer without a cast [-Wint-conversion] return in_le32(fsl_addr) | in_le32(fsl_addr + 1) << 32; ^~~~~~~~ In file included from include/linux/io.h:25:0, from include/linux/irq.h:20, from arch/powerpc/include/asm/hardirq.h:6, from include/linux/hardirq.h:9, from include/linux/interrupt.h:11, from include/linux/pci.h:32, from drivers/dma/fsldma.c:29: arch/powerpc/include/asm/io.h:172:15: note: expected 'const volatile u32 * {aka const volatile unsigned int *}' but argument is of type 'u32 {aka unsigned int}' DEF_MMIO_IN_X(in_le32, 32, lwbrx); ^ arch/powerpc/include/asm/io.h:131:23: note: in definition of macro 'DEF_MMIO_IN_X' static inline u##size name(const volatile u##size __iomem *addr) \ ^~~~ In file included from drivers/dma/fsldma.c:41:0: >> drivers/dma/fsldma.h:210:51: warning: left shift count >= width of type [-Wshift-count-overflow] return in_le32(fsl_addr) | in_le32(fsl_addr + 1) << 32; ^~ drivers/dma/fsldma.h: In function 'fsl_ioread64be': >> drivers/dma/fsldma.h:223:17: warning: passing argument 1 of 'in_be32' makes pointer from integer without a cast [-Wint-conversion] return in_be32(fsl_addr + 1) | in_be32(fsl_addr) << 32; ^~~~~~~~ In file included from include/linux/io.h:25:0, from include/linux/irq.h:20, from arch/powerpc/include/asm/hardirq.h:6, from include/linux/hardirq.h:9, from include/linux/interrupt.h:11, from include/linux/pci.h:32, from drivers/dma/fsldma.c:29: arch/powerpc/include/asm/io.h:170:15: note: expected 'const volatile u32 * {aka const volatile unsigned int *}' but argument is of type 'u32 {aka unsigned int}' DEF_MMIO_IN_D(in_be32, 32, lwz); ^ arch/powerpc/include/asm/io.h:149:23: note: in definition of macro 'DEF_MMIO_IN_D' static inline u##size name(const volatile u##size __iomem *addr) \ ^~~~ In file included from drivers/dma/fsldma.c:41:0: drivers/dma/fsldma.h:223:41: warning: passing argument 1 of 'in_be32' makes pointer from integer without a cast [-Wint-conversion] return in_be32(fsl_addr + 1) | in_be32(fsl_addr) << 32; ^~~~~~~~ In file included from include/linux/io.h:25:0, from include/linux/irq.h:20, from arch/powerpc/include/asm/hardirq.h:6, from include/linux/hardirq.h:9, from include/linux/interrupt.h:11, from include/linux/pci.h:32, from drivers/dma/fsldma.c:29: arch/powerpc/include/asm/io.h:170:15: note: expected 'const volatile u32 * {aka const volatile unsigned int *}' but argument is of type 'u32 {aka unsigned int}' DEF_MMIO_IN_D(in_be32, 32, lwz); ^ arch/powerpc/include/asm/io.h:149:23: note: in definition of macro 'DEF_MMIO_IN_D' static inline u##size name(const volatile u##size __iomem *addr) \ ^~~~ In file included from drivers/dma/fsldma.c:41:0: drivers/dma/fsldma.h:223:51: warning: left shift count >= width of type [-Wshift-count-overflow] return in_be32(fsl_addr + 1) | in_be32(fsl_addr) << 32; ^~ vim +/in_le32 +210 drivers/dma/fsldma.h 204 205 #ifndef __powerpc64__ 206 static u64 fsl_ioread64(const u64 __iomem *addr) 207 { 208 u32 fsl_addr = lower_32_bits(addr); 209 > 210 return in_le32(fsl_addr) | in_le32(fsl_addr + 1) << 32; 211 } 212 213 static void fsl_iowrite64(u64 val, u64 __iomem *addr) 214 { 215 out_le32((u32 __iomem *)addr + 1, val >> 32); 216 out_le32((u32 __iomem *)addr, (u32)val); 217 } 218 219 static u64 fsl_ioread64be(const u64 __iomem *addr) 220 { 221 u32 fsl_addr = lower_32_bits(addr); 222 > 223 return in_be32(fsl_addr + 1) | in_be32(fsl_addr) << 32; 224 } 225 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h index 982845b..f635bc1 100644 --- a/drivers/dma/fsldma.h +++ b/drivers/dma/fsldma.h @@ -196,39 +196,60 @@ struct fsldma_chan { #define to_fsl_desc(lh) container_of(lh, struct fsl_desc_sw, node) #define tx_to_fsl_desc(tx) container_of(tx, struct fsl_desc_sw, async_tx) +#ifdef CONFIG_PPC +#define fsl_ioread32(p) in_le32(p) +#define fsl_ioread32be(p) in_be32(p) +#define fsl_iowrite32(v, p) out_le32(p, v) +#define fsl_iowrite32be(v, p) out_be32(p, v) + #ifndef __powerpc64__ -static u64 in_be64(const u64 __iomem *addr) +static u64 fsl_ioread64(const u64 __iomem *addr) { - return ((u64)in_be32((u32 __iomem *)addr) << 32) | - (in_be32((u32 __iomem *)addr + 1)); + u32 fsl_addr = lower_32_bits(addr); + + return in_le32(fsl_addr) | in_le32(fsl_addr + 1) << 32; } -static void out_be64(u64 __iomem *addr, u64 val) +static void fsl_iowrite64(u64 val, u64 __iomem *addr) { - out_be32((u32 __iomem *)addr, val >> 32); - out_be32((u32 __iomem *)addr + 1, (u32)val); + out_le32((u32 __iomem *)addr + 1, val >> 32); + out_le32((u32 __iomem *)addr, (u32)val); } -/* There is no asm instructions for 64 bits reverse loads and stores */ -static u64 in_le64(const u64 __iomem *addr) +static u64 fsl_ioread64be(const u64 __iomem *addr) { - return ((u64)in_le32((u32 __iomem *)addr + 1) << 32) | - (in_le32((u32 __iomem *)addr)); + u32 fsl_addr = lower_32_bits(addr); + + return in_be32(fsl_addr + 1) | in_be32(fsl_addr) << 32; } -static void out_le64(u64 __iomem *addr, u64 val) +static void fsl_iowrite64be(u64 val, u64 __iomem *addr) { - out_le32((u32 __iomem *)addr + 1, val >> 32); - out_le32((u32 __iomem *)addr, (u32)val); + out_be32((u32 __iomem *)addr, val >> 32); + out_be32((u32 __iomem *)addr + 1, (u32)val); } #endif +#endif -#define FSL_DMA_IN(fsl_chan, addr, width) \ - (((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ? \ - in_be##width(addr) : in_le##width(addr)) -#define FSL_DMA_OUT(fsl_chan, addr, val, width) \ - (((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ? \ - out_be##width(addr, val) : out_le##width(addr, val)) +#if defined(CONFIG_ARM64) || defined(CONFIG_ARM) +#define fsl_ioread32(p) ioread32(p) +#define fsl_ioread32be(p) ioread32be(p) +#define fsl_iowrite32(v, p) iowrite32(v, p) +#define fsl_iowrite32be(v, p) iowrite32be(v, p) +#define fsl_ioread64(p) ioread64(p) +#define fsl_ioread64be(p) ioread64be(p) +#define fsl_iowrite64(v, p) iowrite64(v, p) +#define fsl_iowrite64be(v, p) iowrite64be(v, p) +#endif + +#define FSL_DMA_IN(fsl_dma, addr, width) \ + (((fsl_dma)->feature & FSL_DMA_BIG_ENDIAN) ? \ + fsl_ioread##width##be(addr) : fsl_ioread##width(addr)) + +#define FSL_DMA_OUT(fsl_dma, addr, val, width) \ + (((fsl_dma)->feature & FSL_DMA_BIG_ENDIAN) ? \ + fsl_iowrite##width##be(val, addr) : fsl_iowrite \ + ##width(val, addr)) #define DMA_TO_CPU(fsl_chan, d, width) \ (((fsl_chan)->feature & FSL_DMA_BIG_ENDIAN) ? \