| Message ID | 20181130203646.68615-2-andriy.shevchenko@linux.intel.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [v1,1/5] dmaengine: dw: Fix FIFO size for Intel Merrifield | expand |
diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c index 7778ed705a1a..61f2274f6dd4 100644 --- a/drivers/dma/dw/pci.c +++ b/drivers/dma/dw/pci.c @@ -25,6 +25,7 @@ static struct dw_dma_platform_data mrfld_pdata = { .block_size = 131071, .nr_masters = 1, .data_width = {4}, + .multi_block = {true, true, true, true, true, true, true, true}, }; static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
Intel integrated DMA 32-bit support multi-block transfers. Add missed setting to the platform data. Fixes: f7c799e950f9 ("dmaengine: dw: we do support Merrifield SoC in PCI mode") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: stable@vger.kernel.org --- drivers/dma/dw/pci.c | 1 + 1 file changed, 1 insertion(+)