From patchwork Thu Nov 12 08:49:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sia Jee Heng X-Patchwork-Id: 11899445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8270CC2D0A3 for ; Thu, 12 Nov 2020 09:07:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 332FD206E3 for ; Thu, 12 Nov 2020 09:07:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727858AbgKLJHL (ORCPT ); Thu, 12 Nov 2020 04:07:11 -0500 Received: from mga05.intel.com ([192.55.52.43]:38735 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727845AbgKLJHI (ORCPT ); Thu, 12 Nov 2020 04:07:08 -0500 IronPort-SDR: +H+1Xz+qSgGpdE70EiZbdI02B/IaluvgbBXXyv1aJA7K32Ps4vsflw7vVYwqZnBOiYH/D69ZsB NA52fdw7HhtQ== X-IronPort-AV: E=McAfee;i="6000,8403,9802"; a="254988333" X-IronPort-AV: E=Sophos;i="5.77,471,1596524400"; d="scan'208";a="254988333" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2020 01:07:08 -0800 IronPort-SDR: /exYc94LmtEFWbbmjyIFNbgIZqmFnaaL8C2lYCI1MigXZRDdUCF37XiyclEerDI7zW4abJG1UO HnLbs3oMKX4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,471,1596524400"; d="scan'208";a="360911782" Received: from jsia-hp-z620-workstation.png.intel.com ([10.221.118.135]) by fmsmga002.fm.intel.com with ESMTP; 12 Nov 2020 01:07:06 -0800 From: Sia Jee Heng To: vkoul@kernel.org, Eugeniy.Paltsev@synopsys.com, robh+dt@kernel.org Cc: andriy.shevchenko@linux.intel.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 15/15] dmaengine: dw-axi-dmac: Set constraint to the Max segment size Date: Thu, 12 Nov 2020 16:49:53 +0800 Message-Id: <20201112084953.21629-16-jee.heng.sia@intel.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20201112084953.21629-1-jee.heng.sia@intel.com> References: <20201112084953.21629-1-jee.heng.sia@intel.com> Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Add support for DMA Scatter-Gather (SG) constraint so that DMA clients can handle the AxiDMA limitation. Without supporting DMA constraint the default Max segment size reported by dmaengine is 64KB, which is not supported by Intel KeemBay AxiDMA. Reviewed-by: Andy Shevchenko Signed-off-by: Sia Jee Heng --- drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8 ++++++++ drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 1 + 2 files changed, 9 insertions(+) diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c index 812f51c717e6..7e00d9df4d4d 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -1353,6 +1354,13 @@ static int dw_probe(struct platform_device *pdev) dw->dma.device_prep_slave_sg = dw_axi_dma_chan_prep_slave_sg; dw->dma.device_prep_dma_cyclic = dw_axi_dma_chan_prep_cyclic; + /* + * Synopsis DesignWare AxiDMA datasheet mentioned Maximum + * supported blocks is 1024. Device register width is 4 bytes. + * Therefore, set constraint to 1024 * 4. + */ + dw->dma.dev->dma_parms = &dw->dma_parms; + dma_set_max_seg_size(&pdev->dev, MAX_BLOCK_SIZE); platform_set_drvdata(pdev, chip); pm_runtime_enable(chip->dev); diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h index f64e8d33b127..67669049cead 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -54,6 +54,7 @@ struct axi_dma_chan { struct dw_axi_dma { struct dma_device dma; struct dw_axi_dma_hcfg *hdata; + struct device_dma_parameters dma_parms; /* channels */ struct axi_dma_chan *chan;