From patchwork Tue Mar 30 17:33:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Yadav X-Patchwork-Id: 12173323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38D63C433E8 for ; Tue, 30 Mar 2021 17:36:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 27335619D4 for ; Tue, 30 Mar 2021 17:36:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232688AbhC3Rfs (ORCPT ); Tue, 30 Mar 2021 13:35:48 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:53474 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232057AbhC3Rfm (ORCPT ); Tue, 30 Mar 2021 13:35:42 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 12UHZOJW081103; Tue, 30 Mar 2021 12:35:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1617125724; bh=cY9S08RNNeNDgDIv/MVZU5KNIg3kNk5VaVrsGgk3Lls=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yPAoIu1JqNqgeBkbtqtTAxWcL0R//of/rJ4jsuFZRwZoLJKGdy8gRTVYfjsL1L2PK LxMKaZFQSu0/6lJz/B1i2ncWtgcPMWPwqBslw5oxfeNttVvORmcbICcyZHrFISe7Rn Uset0hGtnheLGe5CvJhdzoIHYdrHqqLvOJYFsxXY= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 12UHZOQb028145 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 Mar 2021 12:35:24 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 30 Mar 2021 12:35:24 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 30 Mar 2021 12:35:24 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 12UHXmgv125244; Tue, 30 Mar 2021 12:35:18 -0500 From: Pratyush Yadav To: Mauro Carvalho Chehab , Rob Herring , Kishon Vijay Abraham I , Vinod Koul , Peter Ujfalusi , Maxime Ripard , Benoit Parrot , Hans Verkuil , Alexandre Courbot , Laurent Pinchart , Stanimir Varbanov , Helen Koike , Michael Tretter , Peter Chen , Chunfeng Yun , , , , , CC: Pratyush Yadav , Vignesh Raghavendra , Tomi Valkeinen Subject: [PATCH 14/16] dt-bindings: phy: Convert Cadence DPHY binding to YAML Date: Tue, 30 Mar 2021 23:03:46 +0530 Message-ID: <20210330173348.30135-15-p.yadav@ti.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210330173348.30135-1-p.yadav@ti.com> References: <20210330173348.30135-1-p.yadav@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Convert Cadence DPHY binding to YAML. Signed-off-by: Pratyush Yadav Reviewed-by: Laurent Pinchart --- .../devicetree/bindings/phy/cdns,dphy.txt | 20 -------- .../devicetree/bindings/phy/cdns,dphy.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 20 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/cdns,dphy.txt create mode 100644 Documentation/devicetree/bindings/phy/cdns,dphy.yaml diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy.txt b/Documentation/devicetree/bindings/phy/cdns,dphy.txt deleted file mode 100644 index 1095bc4e72d9..000000000000 --- a/Documentation/devicetree/bindings/phy/cdns,dphy.txt +++ /dev/null @@ -1,20 +0,0 @@ -Cadence DPHY -============ - -Cadence DPHY block. - -Required properties: -- compatible: should be set to "cdns,dphy". -- reg: physical base address and length of the DPHY registers. -- clocks: DPHY reference clocks. -- clock-names: must contain "psm" and "pll_ref". -- #phy-cells: must be set to 0. - -Example: - dphy0: dphy@fd0e0000{ - compatible = "cdns,dphy"; - reg = <0x0 0xfd0e0000 0x0 0x1000>; - clocks = <&psm_clk>, <&pll_ref_clk>; - clock-names = "psm", "pll_ref"; - #phy-cells = <0>; - }; diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy.yaml b/Documentation/devicetree/bindings/phy/cdns,dphy.yaml new file mode 100644 index 000000000000..d1bbf96a8250 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/cdns,dphy.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/cdns,dphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence DPHY Device Tree Bindings + +maintainers: + - Pratyush Yadav + +properties: + compatible: + items: + - const: cdns,dphy + + reg: + maxItems: 1 + description: Physical base address and length of the DPHY registers. + + clocks: + maxItems: 2 + description: DPHY reference clocks. + + clock-names: + items: + - const: psm + - const: pll_ref + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + + dphy0: dphy@fd0e0000{ + compatible = "cdns,dphy"; + reg = <0xfd0e0000 0x1000>; + clocks = <&psm_clk>, <&pll_ref_clk>; + clock-names = "psm", "pll_ref"; + #phy-cells = <0>; + };