From patchwork Tue Feb 22 10:34:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC3A2C433FE for ; Tue, 22 Feb 2022 10:35:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231254AbiBVKfw (ORCPT ); Tue, 22 Feb 2022 05:35:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229487AbiBVKft (ORCPT ); Tue, 22 Feb 2022 05:35:49 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 532BA15B996; Tue, 22 Feb 2022 02:35:23 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 5DCE3FF809; Tue, 22 Feb 2022 10:35:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526121; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WeWTdPDyu4NpqtMlrcHJAByNbSFMRLqvNKamFBzDCiw=; b=VSRGmdPGgSLRWFydLNbZWxSiWIGxFGVo9aG9go6ynGxAi6eQC+8xdZSbkRSPgajdQV8cea 2JR9kMLvTiwPqBqfV3u2gxjhSDKOi4R+0yYztoZ8URpYt2OrMzY6O+O2BJ6bqwWW6XjcnR YVXfFSlISG6rgrfY17xlruvU0eOxgYK/N8N1l7HxfWF3p3WnQzOZ51S+P92fKV4wn/yrZo Kez4u4dy2huj1w3lxiRDzHqjBAkZKJzlBc63olh5ikzkO1xD44rMLgloiPM4ZVDUls+DlU oMUHh+gjnfmfg+6QG45mu5ShLxlNnSIJxfeZYJqM5Ru8MKu4YcLBk/zEazWiUQ== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 7/8] ARM: dts: r9a06g032: Add the two DMA nodes Date: Tue, 22 Feb 2022 11:34:36 +0100 Message-Id: <20220222103437.194779-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index db657224688a..640c3eb4bbcd 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -184,6 +184,36 @@ nand_controller: nand-controller@40102000 { status = "disabled"; }; + dma0: dma-controller@40104000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40104000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA0>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + + dma1: dma-controller@40105000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40105000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA1>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller;