| Message ID | 20220707002052.1546361-1-fenghua.yu@intel.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | d0b55afa47694f6f61b40f578ede7bde1648fe48 |
| Headers | show |
| Series | dmaengine: idxd: Correct IAX operation code names | expand |
On 06-07-22, 17:20, Fenghua Yu wrote: > Some IAX operation code nomenclatures are misleading or don't match with > others: > > 1. Operation code 0x4c is Zero Compress 32. IAX_OPCODE_DECOMP_32 is a > misleading name. Change it to IAX_OPCODE_ZERO_COMP_32. > 2. Operation code 0x4d is Zero Compress 16. IAX_OPCODE_DECOMP_16 is a > misleading name. Change it to IAX_OPCODE_ZERO_COMP_16. > 3. IAX_OPCDE_FIND_UNIQUE is corrected to match with other nomenclatures. Applied, thanks > > Co-developed-by: Li Zhang <li4.zhang@intel.com> > Signed-off-by: Li Zhang <li4.zhang@intel.com> > Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> > Reviewed-by: Dave Jiang <dave.jiang@intel.com> > --- > include/uapi/linux/idxd.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h > index bce7c43657d5..095299c75828 100644 > --- a/include/uapi/linux/idxd.h > +++ b/include/uapi/linux/idxd.h > @@ -89,14 +89,14 @@ enum iax_opcode { > IAX_OPCODE_CRC64, > IAX_OPCODE_ZERO_DECOMP_32 = 0x48, > IAX_OPCODE_ZERO_DECOMP_16, > - IAX_OPCODE_DECOMP_32 = 0x4c, > - IAX_OPCODE_DECOMP_16, > + IAX_OPCODE_ZERO_COMP_32 = 0x4c, > + IAX_OPCODE_ZERO_COMP_16, > IAX_OPCODE_SCAN = 0x50, > IAX_OPCODE_SET_MEMBER, > IAX_OPCODE_EXTRACT, > IAX_OPCODE_SELECT, > IAX_OPCODE_RLE_BURST, > - IAX_OPCDE_FIND_UNIQUE, > + IAX_OPCODE_FIND_UNIQUE, > IAX_OPCODE_EXPAND, > }; > > -- > 2.32.0
diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h index bce7c43657d5..095299c75828 100644 --- a/include/uapi/linux/idxd.h +++ b/include/uapi/linux/idxd.h @@ -89,14 +89,14 @@ enum iax_opcode { IAX_OPCODE_CRC64, IAX_OPCODE_ZERO_DECOMP_32 = 0x48, IAX_OPCODE_ZERO_DECOMP_16, - IAX_OPCODE_DECOMP_32 = 0x4c, - IAX_OPCODE_DECOMP_16, + IAX_OPCODE_ZERO_COMP_32 = 0x4c, + IAX_OPCODE_ZERO_COMP_16, IAX_OPCODE_SCAN = 0x50, IAX_OPCODE_SET_MEMBER, IAX_OPCODE_EXTRACT, IAX_OPCODE_SELECT, IAX_OPCODE_RLE_BURST, - IAX_OPCDE_FIND_UNIQUE, + IAX_OPCODE_FIND_UNIQUE, IAX_OPCODE_EXPAND, };