Message ID | 20220722084430.969333-1-biju.das.jz@bp.renesas.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 7d3a3aaaa9cc8ec53e9ef4f3e1711827107f76c5 |
Headers | show |
Series | [v4] dmaengine: sh: rz-dmac: Add device_synchronize callback | expand |
On Fri, Jul 22, 2022 at 10:44 AM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Some on-chip peripheral modules(for eg:- rspi) on RZ/G2L SoC > use the same signal for both interrupt and DMA transfer requests. > The signal works as a DMA transfer request signal by setting > DMARS, and subsequent interrupt requests to the interrupt controller > are masked. > > We can re-enable the interrupt by clearing the DMARS. > > This patch adds device_synchronize callback for clearing > DMARS and thereby allowing DMA consumers to switch to > interrupt mode. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v3->v4: > * Increased delay_us 10->100us and timeout_us 1ms->100ms. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On 22-07-22, 09:44, Biju Das wrote: > Some on-chip peripheral modules(for eg:- rspi) on RZ/G2L SoC > use the same signal for both interrupt and DMA transfer requests. > The signal works as a DMA transfer request signal by setting > DMARS, and subsequent interrupt requests to the interrupt controller > are masked. > > We can re-enable the interrupt by clearing the DMARS. > > This patch adds device_synchronize callback for clearing > DMARS and thereby allowing DMA consumers to switch to > interrupt mode. Applied, thanks
diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index ee2872e7d64c..476847a4916b 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -12,6 +12,7 @@ #include <linux/dma-mapping.h> #include <linux/dmaengine.h> #include <linux/interrupt.h> +#include <linux/iopoll.h> #include <linux/list.h> #include <linux/module.h> #include <linux/of.h> @@ -630,6 +631,21 @@ static void rz_dmac_virt_desc_free(struct virt_dma_desc *vd) */ } +static void rz_dmac_device_synchronize(struct dma_chan *chan) +{ + struct rz_dmac_chan *channel = to_rz_dmac_chan(chan); + struct rz_dmac *dmac = to_rz_dmac(chan->device); + u32 chstat; + int ret; + + ret = read_poll_timeout(rz_dmac_ch_readl, chstat, !(chstat & CHSTAT_EN), + 100, 100000, false, channel, CHSTAT, 1); + if (ret < 0) + dev_warn(dmac->dev, "DMA Timeout"); + + rz_dmac_set_dmars_register(dmac, channel->index, 0); +} + /* * ----------------------------------------------------------------------------- * IRQ handling @@ -909,6 +925,7 @@ static int rz_dmac_probe(struct platform_device *pdev) engine->device_config = rz_dmac_config; engine->device_terminate_all = rz_dmac_terminate_all; engine->device_issue_pending = rz_dmac_issue_pending; + engine->device_synchronize = rz_dmac_device_synchronize; engine->copy_align = DMAENGINE_ALIGN_1_BYTE; dma_set_max_seg_size(engine->dev, U32_MAX);
Some on-chip peripheral modules(for eg:- rspi) on RZ/G2L SoC use the same signal for both interrupt and DMA transfer requests. The signal works as a DMA transfer request signal by setting DMARS, and subsequent interrupt requests to the interrupt controller are masked. We can re-enable the interrupt by clearing the DMARS. This patch adds device_synchronize callback for clearing DMARS and thereby allowing DMA consumers to switch to interrupt mode. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v3->v4: * Increased delay_us 10->100us and timeout_us 1ms->100ms. v2->v3: * Fixed commit description * Added check if the DMA operation has been completed or terminated, and wait (sleep) if needed. v1->v2: * No change --- drivers/dma/sh/rz-dmac.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)