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[219.106.231.132]) by smtp.gmail.com with ESMTPSA id e3-20020a17090a818300b00233aacab89esm1182904pjn.48.2023.03.17.04.33.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Mar 2023 04:33:06 -0700 (PDT) From: Shunsuke Mie To: Gustavo Pimentel Cc: Vinod Koul , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Arnd Bergmann , Greg Kroah-Hartman , Bjorn Helgaas , Shunsuke Mie , Kunihiko Hayashi , Yoshihiro Shimoda , Frank Li , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-pci@vger.kernel.org Subject: [RFC PATCH 06/11] misc: pci_endpoint_test: Use a common header file between endpoint driver Date: Fri, 17 Mar 2023 20:32:33 +0900 Message-Id: <20230317113238.142970-7-mie@igel.co.jp> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230317113238.142970-1-mie@igel.co.jp> References: <20230317113238.142970-1-mie@igel.co.jp> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Duplicated definitions between pci-epf-test and pci_endpoint_test are already moved to a header file. Remove the common definitions and include the header file. In addition, the separate register address writes were combined into a single write. Signed-off-by: Shunsuke Mie --- drivers/misc/pci_endpoint_test.c | 42 +------------------------------- 1 file changed, 1 insertion(+), 41 deletions(-) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index 55733dee95ad..d4a42e9ab86a 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -22,52 +22,12 @@ #include #include +#include #include #define DRV_MODULE_NAME "pci-endpoint-test" -#define IRQ_TYPE_UNDEFINED -1 -#define IRQ_TYPE_LEGACY 0 -#define IRQ_TYPE_MSI 1 -#define IRQ_TYPE_MSIX 2 - -#define PCI_ENDPOINT_TEST_MAGIC 0x0 - -#define PCI_ENDPOINT_TEST_COMMAND 0x4 -#define COMMAND_RAISE_LEGACY_IRQ BIT(0) -#define COMMAND_RAISE_MSI_IRQ BIT(1) -#define COMMAND_RAISE_MSIX_IRQ BIT(2) -#define COMMAND_READ BIT(3) -#define COMMAND_WRITE BIT(4) -#define COMMAND_COPY BIT(5) - -#define PCI_ENDPOINT_TEST_STATUS 0x8 -#define STATUS_READ_SUCCESS BIT(0) -#define STATUS_READ_FAIL BIT(1) -#define STATUS_WRITE_SUCCESS BIT(2) -#define STATUS_WRITE_FAIL BIT(3) -#define STATUS_COPY_SUCCESS BIT(4) -#define STATUS_COPY_FAIL BIT(5) -#define STATUS_IRQ_RAISED BIT(6) -#define STATUS_SRC_ADDR_INVALID BIT(7) -#define STATUS_DST_ADDR_INVALID BIT(8) - -#define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c -#define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10 - -#define PCI_ENDPOINT_TEST_LOWER_DST_ADDR 0x14 -#define PCI_ENDPOINT_TEST_UPPER_DST_ADDR 0x18 - -#define PCI_ENDPOINT_TEST_SIZE 0x1c -#define PCI_ENDPOINT_TEST_CHECKSUM 0x20 - -#define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24 -#define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28 - -#define PCI_ENDPOINT_TEST_FLAGS 0x2c -#define FLAG_USE_DMA BIT(0) - #define PCI_DEVICE_ID_TI_AM654 0xb00c #define PCI_DEVICE_ID_TI_J7200 0xb00f #define PCI_DEVICE_ID_TI_AM64 0xb010