From patchwork Thu Apr 27 17:49:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Pan X-Patchwork-Id: 13225659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5989C7EE21 for ; Thu, 27 Apr 2023 17:45:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244477AbjD0Rpn (ORCPT ); Thu, 27 Apr 2023 13:45:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244409AbjD0Rpk (ORCPT ); Thu, 27 Apr 2023 13:45:40 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5B724233; Thu, 27 Apr 2023 10:45:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1682617523; x=1714153523; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sUwpT3UJslOINCLJ0IN/Qa1aCnftYprMhdpAjRPm5/Y=; b=ciYR0MYwUGGACADHMXWzkZIwKn0K1Z/IQaKXidGtqZohfuTspkXmgcvR F5h9gGQ1PzdU8TUsaJL+6ILvKIhiSVC9h/3QZZ4p6LrxIxIH6zzg4kJHd 7xr09rigBynA6QDbusaQTb1/WLXzVjOS8qzq9OWeT2wL+aevW5H2O0wlp kp7MdPr4IA6Me8ppRUfUtRkutBznaQe3m+sqvrCYOrR7lZclkqW1XvU+D VBG3fSVT5qFMoJ4JEYFq4jUPf42Jjcb7gsIv4q7kKYqppVogcnXuMiPA+ ncuIvZ6XtkPXLPZnY5LZF3biJN2bmkhUHW0R6oLmIi3kwt9z/1ElwzScI g==; X-IronPort-AV: E=McAfee;i="6600,9927,10693"; a="350398707" X-IronPort-AV: E=Sophos;i="5.99,232,1677571200"; d="scan'208";a="350398707" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2023 10:45:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10693"; a="1024219698" X-IronPort-AV: E=Sophos;i="5.99,232,1677571200"; d="scan'208";a="1024219698" Received: from srinivas-otcpl-7600.jf.intel.com (HELO jacob-builder.jf.intel.com) ([10.54.39.106]) by fmsmga005.fm.intel.com with ESMTP; 27 Apr 2023 10:45:20 -0700 From: Jacob Pan To: LKML , iommu@lists.linux.dev, "Robin Murphy" , Jason Gunthorpe , "Lu Baolu" , Joerg Roedel , dmaengine@vger.kernel.org, vkoul@kernel.org Cc: "Will Deacon" , David Woodhouse , Raj Ashok , "Tian, Kevin" , Yi Liu , "Yu, Fenghua" , Dave Jiang , Tony Luck , "Zanussi, Tom" , narayan.ranganathan@intel.com, Jacob Pan Subject: [PATCH v5 2/7] iommu/sva: Explicitly exclude RID_PASID from SVA Date: Thu, 27 Apr 2023 10:49:32 -0700 Message-Id: <20230427174937.471668-3-jacob.jun.pan@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230427174937.471668-1-jacob.jun.pan@linux.intel.com> References: <20230427174937.471668-1-jacob.jun.pan@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org SVA PASID allocation is hardcoded to start from 1 because 0 is used for RID_PASID, let's make it explicit to avoid the potential conflicts. Signed-off-by: Jacob Pan --- drivers/iommu/iommu-sva.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index c434b95dc8eb..ac7c93bacb5c 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -66,7 +66,7 @@ struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm return ERR_PTR(-EOPNOTSUPP); /* Allocate mm->pasid if necessary. */ - ret = iommu_sva_alloc_pasid(mm, 1, max_pasids - 1); + ret = iommu_sva_alloc_pasid(mm, IOMMU_DEF_RID_PASID + 1, max_pasids - 1); if (ret) return ERR_PTR(ret);