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[v3,06/15] dmaengine: idxd: Add private_data to struct idxd_wq

Message ID 20230428205539.113902-7-tom.zanussi@linux.intel.com (mailing list archive)
State Superseded
Headers show
Series crypto: Add Intel Analytics Accelerator (IAA) crypto compression driver | expand

Commit Message

Zanussi, Tom April 28, 2023, 8:55 p.m. UTC
Add a void * to idxd_wqs for user-defined context data, along with
accessors set_idxd_wq_private() and idxd_wq_private().

Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
---
 drivers/dma/idxd/idxd.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Dave Jiang May 1, 2023, 2:50 p.m. UTC | #1
On 4/28/23 1:55 PM, Tom Zanussi wrote:
> Add a void * to idxd_wqs for user-defined context data, along with
> accessors set_idxd_wq_private() and idxd_wq_private().
> 
> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>

> ---
>   drivers/dma/idxd/idxd.h | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
> index 719f9f1662ad..0402f97d6ff8 100644
> --- a/drivers/dma/idxd/idxd.h
> +++ b/drivers/dma/idxd/idxd.h
> @@ -216,6 +216,8 @@ struct idxd_wq {
>   	u32 max_batch_size;
>   
>   	char driver_name[WQ_NAME_SIZE + 1];
> +
> +	void *private_data;
>   };
>   
>   struct idxd_engine {
> @@ -550,6 +552,16 @@ static inline int idxd_wq_refcount(struct idxd_wq *wq)
>   	return wq->client_count;
>   };
>   
> +static inline void set_idxd_wq_private(struct idxd_wq *wq, void *private)
> +{
> +	wq->private_data = private;
> +}
> +
> +static inline void *idxd_wq_private(struct idxd_wq *wq)
> +{
> +	return wq->private_data;
> +}
> +
>   /*
>    * Intel IAA does not support batch processing.
>    * The max batch size of device, max batch size of wq and
Fenghua Yu May 1, 2023, 6:50 p.m. UTC | #2
On 4/28/23 13:55, Tom Zanussi wrote:
> Add a void * to idxd_wqs for user-defined context data, along with
> accessors set_idxd_wq_private() and idxd_wq_private().
> 
> Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>

Reviewed-by: Fenghua Yu <fenghua.yu@intel.com>

Thanks.

-Fenghua
diff mbox series

Patch

diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
index 719f9f1662ad..0402f97d6ff8 100644
--- a/drivers/dma/idxd/idxd.h
+++ b/drivers/dma/idxd/idxd.h
@@ -216,6 +216,8 @@  struct idxd_wq {
 	u32 max_batch_size;
 
 	char driver_name[WQ_NAME_SIZE + 1];
+
+	void *private_data;
 };
 
 struct idxd_engine {
@@ -550,6 +552,16 @@  static inline int idxd_wq_refcount(struct idxd_wq *wq)
 	return wq->client_count;
 };
 
+static inline void set_idxd_wq_private(struct idxd_wq *wq, void *private)
+{
+	wq->private_data = private;
+}
+
+static inline void *idxd_wq_private(struct idxd_wq *wq)
+{
+	return wq->private_data;
+}
+
 /*
  * Intel IAA does not support batch processing.
  * The max batch size of device, max batch size of wq and