@@ -120,7 +120,7 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
slot = EDMAMUX_CHCFG_SOURCE(slot);
- if (fsl_chan->edma->drvdata->version == v3)
+ if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_CONFIG32)
mux_configure32(fsl_chan, muxaddr, ch_off, slot, enable);
else
mux_configure8(fsl_chan, muxaddr, ch_off, slot, enable);
@@ -141,11 +141,11 @@ struct fsl_edma_desc {
enum edma_version {
v1, /* 32ch, Vybrid, mpc57x, etc */
v2, /* 64ch Coldfire */
- v3, /* 32ch, i.mx7ulp */
};
#define FSL_EDMA_DRV_HAS_DMACLK BIT(0)
#define FSL_EDMA_DRV_MUX_SWAP BIT(1)
+#define FSL_EDMA_DRV_CONFIG32 BIT(2)
struct fsl_edma_drvdata {
enum edma_version version;
u32 dmamuxs;
@@ -238,9 +238,9 @@ static struct fsl_edma_drvdata ls1028a_data = {
};
static struct fsl_edma_drvdata imx7ulp_data = {
- .version = v3,
+ .version = v1,
.dmamuxs = 1,
- .flags = FSL_EDMA_DRV_HAS_DMACLK,
+ .flags = FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_CONFIG32,
.setup_irq = fsl_edma2_irq_init,
};
The new IP of edma refers to version 3 in the hardware documentation. However, the presence of "v3" in the code is merely a software indication to differentiate between certain chips. To prevent confusion in the future, this commit removes "v3" from the enum edma_version. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- drivers/dma/fsl-edma-common.c | 2 +- drivers/dma/fsl-edma-common.h | 2 +- drivers/dma/fsl-edma-main.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-)