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[2/2] dma: rz-dmac: Fix Destination and Source Data Size setting

Message ID 20230630154438.584066-3-biju.das.jz@bp.renesas.com (mailing list archive)
State Superseded
Headers show
Series RZ/G2L DMA fix/improvements | expand

Commit Message

Biju Das June 30, 2023, 3:44 p.m. UTC
From: Hien Huynh <hien.huynh.px@renesas.com>

Before setting DDS and SDS values, we need to clear its value first
otherwise, we get incorrect results when we change/update the DMA bus
width several times due to the 'OR' expression.

Fixes: 5000d37042a6 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC")
Signed-off-by: Hien Huynh <hien.huynh.px@renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/dma/sh/rz-dmac.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
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Patch

diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
index 229f642fde6b..331ea80f21b0 100644
--- a/drivers/dma/sh/rz-dmac.c
+++ b/drivers/dma/sh/rz-dmac.c
@@ -145,8 +145,10 @@  struct rz_dmac {
 #define CHCFG_REQD			BIT(3)
 #define CHCFG_SEL(bits)			((bits) & 0x07)
 #define CHCFG_MEM_COPY			(0x80400008)
-#define CHCFG_FILL_DDS(a)		(((a) << 16) & GENMASK(19, 16))
-#define CHCFG_FILL_SDS(a)		(((a) << 12) & GENMASK(15, 12))
+#define CHCFG_FILL_DDS_MASK		GENMASK(19, 16)
+#define CHCFG_FILL_DDS(a)		(((a) << 16) & CHCFG_FILL_DDS_MASK)
+#define CHCFG_FILL_SDS_MASK		GENMASK(15, 12)
+#define CHCFG_FILL_SDS(a)		(((a) << 12) & CHCFG_FILL_SDS_MASK)
 #define CHCFG_FILL_TM(a)		(((a) & BIT(5)) << 22)
 #define CHCFG_FILL_AM(a)		(((a) & GENMASK(4, 2)) << 6)
 #define CHCFG_FILL_LVL(a)		(((a) & BIT(1)) << 5)
@@ -607,12 +609,14 @@  static int rz_dmac_config(struct dma_chan *chan,
 	if (val == CHCFG_DS_INVALID)
 		return -EINVAL;
 
+	channel->chcfg &= ~CHCFG_FILL_DDS_MASK;
 	channel->chcfg |= CHCFG_FILL_DDS(val);
 
 	val = rz_dmac_ds_to_val_mapping(config->src_addr_width);
 	if (val == CHCFG_DS_INVALID)
 		return -EINVAL;
 
+	channel->chcfg &= ~CHCFG_FILL_SDS_MASK;
 	channel->chcfg |= CHCFG_FILL_SDS(val);
 
 	return 0;