diff mbox series

[v4,2/2] dt-bindings: dma: HiSilicon: Add bindings for HiSilicon Ascend sdma

Message ID 20230913082825.3180-3-guomengqi3@huawei.com (mailing list archive)
State Superseded
Headers show
Series Add dma controller driver for HiSilicon Ascend310/910 | expand

Commit Message

guomengqi (A) Sept. 13, 2023, 8:28 a.m. UTC
Add device-tree binding documentation for sdma hardware on
HiSilicon Ascend SoC families.

Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
---
 .../bindings/dma/hisilicon,ascend-sdma.yaml   | 74 +++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml

Comments

Krzysztof Kozlowski Sept. 13, 2023, 9:20 a.m. UTC | #1
On 13/09/2023 10:28, Guo Mengqi wrote:
> Add device-tree binding documentation for sdma hardware on
> HiSilicon Ascend SoC families.
> 
> Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
> ---

> +  dma-channel-mask:
> +    minItems: 1
> +    maxItems: 2

Why 2? Care to bring any example? Where is your DTS?

> +  iommus:
> +    maxItems: 1
> +
> +  pasid-num-bits:
> +    description: |
> +      This tells smmu that this device supports iommu-sva feature.
> +      This determines the maximum number of digits in the pasid.
> +    maximum: 0x10
> +
> +  dma-coherent: true
> +
> +  dma-can-stall: true
> +
> +required:
> +  - compatible
> +  - reg
> +  - dma-channel-mask
> +  - '#dma-cells'
> +  - iommus
> +  - pasid-num-bits
> +  - dma-can-stall

I am not sure if requiring dma-can-stall is correct here. To my
understanding this is in general optional property.

Best regards,
Krzysztof
guomengqi (A) Sept. 15, 2023, 7:07 a.m. UTC | #2
在 2023/9/13 17:20, Krzysztof Kozlowski 写道:
> On 13/09/2023 10:28, Guo Mengqi wrote:
>> Add device-tree binding documentation for sdma hardware on
>> HiSilicon Ascend SoC families.
>>
>> Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
>> ---
>>
>> +  dma-channel-mask:
>> +    minItems: 1
>> +    maxItems: 2
> Why 2? Care to bring any example? Where is your DTS?

Seems that the complete dts is not in the repository.

Some platform supports up to 40 channels at most, in design. So I think 
2 should be enough.

>> +  iommus:
>> +    maxItems: 1
>> +
>> +  pasid-num-bits:
>> +    description: |
>> +      This tells smmu that this device supports iommu-sva feature.
>> +      This determines the maximum number of digits in the pasid.
>> +    maximum: 0x10
>> +
>> +  dma-coherent: true
>> +
>> +  dma-can-stall: true
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - dma-channel-mask
>> +  - '#dma-cells'
>> +  - iommus
>> +  - pasid-num-bits
>> +  - dma-can-stall
> I am not sure if requiring dma-can-stall is correct here. To my
> understanding this is in general optional property.

If  "dma-can-stall" is declared,  drivers can rely on smmu to handle 
page-fault.

Yes, this is not a required one. It does not affect main usage. Drop it 
in next patch.

> Best regards,
> Krzysztof
>
>
> .

Best regards,

Guo Mengqi
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml b/Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml
new file mode 100644
index 000000000000..9a3f8b701395
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/hisilicon,ascend-sdma.yaml
@@ -0,0 +1,74 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/hisilicon,ascend-sdma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon Ascend System DMA (SDMA) controller
+
+description: |
+  The Ascend SDMA controller is used for transferring data
+  in system memory.
+
+maintainers:
+  - Guo Mengqi <guomengqi3@huawei.com>
+
+allOf:
+  - $ref: dma-controller.yaml#
+
+properties:
+  compatible:
+    enum:
+      - hisilicon,ascend310-sdma
+      - hisilicon,ascend910-sdma
+
+  reg:
+    maxItems: 1
+
+  '#dma-cells':
+    const: 1
+    description:
+      Clients specify a single cell with channel number.
+
+  dma-channel-mask:
+    minItems: 1
+    maxItems: 2
+
+  iommus:
+    maxItems: 1
+
+  pasid-num-bits:
+    description: |
+      This tells smmu that this device supports iommu-sva feature.
+      This determines the maximum number of digits in the pasid.
+    maximum: 0x10
+
+  dma-coherent: true
+
+  dma-can-stall: true
+
+required:
+  - compatible
+  - reg
+  - dma-channel-mask
+  - '#dma-cells'
+  - iommus
+  - pasid-num-bits
+  - dma-can-stall
+
+additionalProperties: false
+
+examples:
+  - |
+    dma-controller@880e0000 {
+        compatible = "hisilicon,ascend310-sdma";
+        reg = <0x880e0000 0x10000>;
+        dma-channel-mask = <0xff00>;
+        iommus = <&smmu 0x7f46>;
+        pasid-num-bits = <0x10>;
+        dma-coherent;
+        dma-can-stall;
+        #dma-cells = <1>;
+    };
+
+...