Message ID | 20231003121542.3139696-1-kory.maincent@bootlin.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | None | expand |
On Tue, Oct 03, 2023 at 02:15:42PM +0200, Köry Maincent wrote: > From: Kory Maincent <kory.maincent@bootlin.com> > > The Linked list element and pointer are not stored in the same memory as > the HDMA controller register. If the doorbell register is toggled before > the full write of the linked list a race condition error can appears. > In remote setup we can only use a readl to the memory to assured the full > write has occurred. > > Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") > Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> > --- > > Changes in v2: > - Move the sync read in a function. > - Add commments Note you need to resubmit the entire series if any of its part has changed. So please add these patches to your patchset (in place of the 4/5 and 5/5 patches I commented) and resend it as v3. -Serge(y) > --- > drivers/dma/dw-edma/dw-hdma-v0-core.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c > index 0cce1880cfdc..9109dd6c2e76 100644 > --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c > +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c > @@ -221,6 +221,20 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) > dw_hdma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); > } > > +static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) > +{ > + /* > + * In case of remote HDMA engine setup, the DW PCIe RP/EP internals > + * configuration registers and Application memory are normally accessed > + * over different buses. Ensure LL-data reaches the memory before the > + * doorbell register is toggled by issuing the dummy-read from the remote > + * LL memory in a hope that the posted MRd TLP will return only after the > + * last MWr TLP is completed > + */ > + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) > + readl(chunk->ll_region.vaddr.io); > +} > + > static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > { > struct dw_edma_chan *chan = chunk->chan; > @@ -251,6 +265,9 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > /* Set consumer cycle */ > SET_CH_32(dw, chan->dir, chan->id, cycle_sync, > HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT); > + > + dw_hdma_v0_sync_ll_data(chunk); > + > /* Doorbell */ > SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START); > } > -- > 2.25.1 >
On Tue, 3 Oct 2023 18:20:23 +0300 Serge Semin <fancer.lancer@gmail.com> wrote: > On Tue, Oct 03, 2023 at 02:15:42PM +0200, Köry Maincent wrote: > > From: Kory Maincent <kory.maincent@bootlin.com> > > > > The Linked list element and pointer are not stored in the same memory as > > the HDMA controller register. If the doorbell register is toggled before > > the full write of the linked list a race condition error can appears. > > In remote setup we can only use a readl to the memory to assured the full > > write has occurred. > > > > Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") > > Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> > > --- > > > > Changes in v2: > > - Move the sync read in a function. > > - Add commments > > Note you need to resubmit the entire series if any of its part has > changed. So please add these patches to your patchset (in place of the > 4/5 and 5/5 patches I commented) and resend it as v3. Alright. Should I wait for Cai's response for patch 1/5 before sending v3. He seems to never having woken up in our discussions.
On Tue, Oct 03, 2023 at 05:34:32PM +0200, Köry Maincent wrote: > On Tue, 3 Oct 2023 18:20:23 +0300 > Serge Semin <fancer.lancer@gmail.com> wrote: > > > On Tue, Oct 03, 2023 at 02:15:42PM +0200, Köry Maincent wrote: > > > From: Kory Maincent <kory.maincent@bootlin.com> > > > > > > The Linked list element and pointer are not stored in the same memory as > > > the HDMA controller register. If the doorbell register is toggled before > > > the full write of the linked list a race condition error can appears. > > > In remote setup we can only use a readl to the memory to assured the full > > > write has occurred. > > > > > > Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") > > > Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> > > > --- > > > > > > Changes in v2: > > > - Move the sync read in a function. > > > - Add commments > > > > Note you need to resubmit the entire series if any of its part has > > changed. So please add these patches to your patchset (in place of the > > 4/5 and 5/5 patches I commented) and resend it as v3. > > Alright. > Should I wait for Cai's response for patch 1/5 before sending v3. He seems to > never having woken up in our discussions. Ok. Let's wait for Cai for sometime. We are in the middle of the dev-cycle anyway so no reason to rush. -Serge(y)
diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c index 0cce1880cfdc..9109dd6c2e76 100644 --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c @@ -221,6 +221,20 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) dw_hdma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); } +static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) +{ + /* + * In case of remote HDMA engine setup, the DW PCIe RP/EP internals + * configuration registers and Application memory are normally accessed + * over different buses. Ensure LL-data reaches the memory before the + * doorbell register is toggled by issuing the dummy-read from the remote + * LL memory in a hope that the posted MRd TLP will return only after the + * last MWr TLP is completed + */ + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) + readl(chunk->ll_region.vaddr.io); +} + static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) { struct dw_edma_chan *chan = chunk->chan; @@ -251,6 +265,9 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) /* Set consumer cycle */ SET_CH_32(dw, chan->dir, chan->id, cycle_sync, HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT); + + dw_hdma_v0_sync_ll_data(chunk); + /* Doorbell */ SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START); }