| Message ID | 20231011-b4-feature_hdma_mainline-v3-6-24ee0c979c6f@bootlin.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Fix support of dw-edma HDMA NATIVE IP in remote setup | expand |
On Wed, Oct 11, 2023 at 10:11:45AM +0200, Kory Maincent wrote: > The Linked list element and pointer are not stored in the same memory as > the eDMA controller register. If the doorbell register is toggled before > the full write of the linked list a race condition error can appears. s/can appears/will occur > In remote setup we can only use a readl to the memory to assured the full s/assured/assure > write has occurred. > > Fixes: 7e4b8a4fbe2c ("dmaengine: Add Synopsys eDMA IP version 0 support") > Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> -Serge(y) > --- > > Changes in v2: > - New patch > --- > drivers/dma/dw-edma/dw-edma-v0-core.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c > index b38786f0ad79..6245b720fbfe 100644 > --- a/drivers/dma/dw-edma/dw-edma-v0-core.c > +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c > @@ -346,6 +346,20 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) > dw_edma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); > } > > +static void dw_edma_v0_sync_ll_data(struct dw_edma_chunk *chunk) > +{ > + /* > + * In case of remote eDMA engine setup, the DW PCIe RP/EP internals > + * configuration registers and Application memory are normally accessed > + * over different buses. Ensure LL-data reaches the memory before the > + * doorbell register is toggled by issuing the dummy-read from the remote > + * LL memory in a hope that the posted MRd TLP will return only after the > + * last MWr TLP is completed > + */ > + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) > + readl(chunk->ll_region.vaddr.io); > +} > + > static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > { > struct dw_edma_chan *chan = chunk->chan; > @@ -412,6 +426,9 @@ static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > SET_CH_32(dw, chan->dir, chan->id, llp.msb, > upper_32_bits(chunk->ll_region.paddr)); > } > + > + dw_edma_v0_sync_ll_data(chunk); > + > /* Doorbell */ > SET_RW_32(dw, chan->dir, doorbell, > FIELD_PREP(EDMA_V0_DOORBELL_CH_MASK, chan->id)); > > -- > 2.25.1 >
diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c index b38786f0ad79..6245b720fbfe 100644 --- a/drivers/dma/dw-edma/dw-edma-v0-core.c +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c @@ -346,6 +346,20 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) dw_edma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); } +static void dw_edma_v0_sync_ll_data(struct dw_edma_chunk *chunk) +{ + /* + * In case of remote eDMA engine setup, the DW PCIe RP/EP internals + * configuration registers and Application memory are normally accessed + * over different buses. Ensure LL-data reaches the memory before the + * doorbell register is toggled by issuing the dummy-read from the remote + * LL memory in a hope that the posted MRd TLP will return only after the + * last MWr TLP is completed + */ + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) + readl(chunk->ll_region.vaddr.io); +} + static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) { struct dw_edma_chan *chan = chunk->chan; @@ -412,6 +426,9 @@ static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) SET_CH_32(dw, chan->dir, chan->id, llp.msb, upper_32_bits(chunk->ll_region.paddr)); } + + dw_edma_v0_sync_ll_data(chunk); + /* Doorbell */ SET_RW_32(dw, chan->dir, doorbell, FIELD_PREP(EDMA_V0_DOORBELL_CH_MASK, chan->id));
The Linked list element and pointer are not stored in the same memory as the eDMA controller register. If the doorbell register is toggled before the full write of the linked list a race condition error can appears. In remote setup we can only use a readl to the memory to assured the full write has occurred. Fixes: 7e4b8a4fbe2c ("dmaengine: Add Synopsys eDMA IP version 0 support") Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> --- Changes in v2: - New patch --- drivers/dma/dw-edma/dw-edma-v0-core.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)